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FDS2570 Fiches technique(PDF) 9 Page - Fairchild Semiconductor |
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FDS2570 Fiches technique(HTML) 9 Page - Fairchild Semiconductor |
9 / 12 page 9 Rev. A, June 2001 ©2001 Fairchild Semiconductor Corporation levels approaching 390 watts are theoretically possible. Paralleling FETs allows this number to be increased. The output waveforms of the bridge design look the same as the push pull. The FET drain voltages are depicted in Figure 11. Figure 10. The basic circuit design for a full-bridge regulator topology. Figure 11. Voltage and current waveforms for the full-bridge regulator. D1 D2 L1 T1 Q2 Q4 Q1 VIN Gate 1 Gate U1 PWM Gate Input 1 Isolation Input 2 GND GND Source 1 Gate 2 Source 2 RTN C2 + C1 + VOUT Q3 VGS(Q2&Q3) VGS(Q1&Q4) PWM'ED EDGE Can vary from 0 to VIN -VIN VDS(Q1&Q4) VDS(Q2&Q3) VSW2 VSAT IPK 0 2 TIME SW 1-4 SW 2-3 VIN VIN ISW2 0 TIME IMIN Can vary from 0 to VIN -VIN |
Numéro de pièce similaire - FDS2570 |
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Description similaire - FDS2570 |
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