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LC66408A Fiches technique(PDF) 9 Page - Sanyo Semicon Device |
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LC66408A Fiches technique(HTML) 9 Page - Sanyo Semicon Device |
9 / 21 page Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V, VDD = 2.5 to 5.5 V, unless otherwise specified. Note: 1. Applies to pins with open-drain specifications. However, VIH2 applies to the P33/HOLD pin. When ports P2, P3, and P6 have CMOS output specifications they cannot be used as input pins. 2. Applies to pins with open-drain specifications. 3. When RE is used as a three-value input, VIH4, VIM, and VIL4 apply. When the ports PC pins have CMOS output specifications they cannot be used as input pins. No. 5484-9/21 LC66354C, 66356C, 66358C Parameter Symbol Conditions min typ max Unit Note Operating supply voltage VDD VDD: 0.92 ≤ Tcyc ≤ 10 µs 2.5 5.5 V Memory retention supply voltage VDDHVDD: During hold mode 1.8 5.5 V V IH1 P2, P3 (except for the P33/HOLD pin), P4, P5, 0.8 V DD +13.5 V 1 and P6: N-channel output transistor off V IH2 P33/HOLD, RES, OSC1: 0.8 V DD V DD V2 Input high-level voltage N-channel output transistor off V IH3 P0, P1, PC, PD, PE: 0.8 V DD V DD V3 N-channel output transistor off VIH4 PE: With 3-value input used, VDD = 3.0 to 5.5 V 0.8 VDD VDD V Mid-level input voltage VIM PE: With 3-value input used, VDD = 3.0 to 5.5 V 0.4 VDD 0.6 VDD V V CMM1 PD0, PC2: When the comparator input is used, 1.5 V DD V Common-mode input VDD = 3.0 to 5.5 V voltage range V CMM2 PD1, PD2, PD3, PC3: When the comparator V SS V DD – 1.5 V input is used, VDD = 3.0 to 5.5 V V IL1 P2, P3 (except for the P33/HOLD pin), P5, P6, 0.2 V DD V2 RES, and OSC1: N-channel output transistor off Input low-level voltage VIL2 P33/HOLD: VDD = 1.8 to 5.5 V 0.2 VDD V V IL3 P0, P1, P4, PC, PD, PE, TEST: V SS 0.2 V DD V3 N-channel output transistor off VIL4 PE: With 3-value input used, VDD = 3.0 to 5.5 V VSS 0.2 VDD V Operating frequency fop 0.4 4.35 MHz (instruction cycle time) (Tcyc) (10) (0.92) (µs) [External clock input conditions] OSC1: Defined by Figure 1. Input the clock Frequency f ext signal to OSC1 and leave OSC2 open. 0.4 4.35 MHz (External clock input must be selected as the oscillator circuit option.) OSC1: Defined by Figure 1. Input the clock Pulse width t extH, textL signal to OSC1 and leave OSC2 open. 100 ns (External clock input must be selected as the oscillator circuit option.) OSC1: Defined by Figure 1. Input the clock Rise and fall times t extR, textF signal to OSC1 and leave OSC2 open. 30 ns (External clock input must be selected as the oscillator circuit option.) |
Numéro de pièce similaire - LC66408A |
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Description similaire - LC66408A |
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