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AD8361 Fiches technique(PDF) 15 Page - Analog Devices |
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AD8361 Fiches technique(HTML) 15 Page - Analog Devices |
15 / 24 page AD8361 Rev. C | Page 15 of 24 The filter capacitance of the AD8361 can be augmented by connecting a capacitor between Pin 6 (FLTR) and VPOS. Table 7 shows the effect of several capacitor values for various communications standards with high peak-to-average ratios along with the residual ripple at the output, in peak-to-peak and rms volts. Note that large filter capacitors increase the enable and pulse response times, as discussed below. Table 7. Effect of Waveform and CFILT on Residual AC Output Residual AC Waveform CFILT V dc mV p-p mV rms IS95 Reverse Link Open 0.5 550 100 1.0 1000 180 2.0 2000 360 0.01 µF 0.5 40 6 1.0 160 20 2.0 430 60 0.1 µF 0.5 20 3 1.0 40 6 2.0 110 18 IS95 8-Channel 0.01 µF 0.5 290 40 Forward Link 1.0 975 150 2.0 2600 430 0.1 µF 0.5 50 7 1.0 190 30 2.0 670 95 W-CDMA 15 0.01 µF 0.5 225 35 Channel 1.0 940 135 2.0 2500 390 0.1 µF 0.5 45 6 1.0 165 25 2.0 550 80 Operation at Low Frequencies Although the AD8361 is specified for operation up to 2.5 GHz, there is no lower limit on the operating frequency. It is only necessary to increase the input coupling capacitor to reduce the corner frequency of the input high-pass filter (use an input resistance of 225 Ω for frequencies below 100 MHz). It is also necessary to increase the filter capacitor so that the signal at the output of the squaring circuit is free of ripple. The corner frequency is set by the combination of the internal resistance of 2 kΩ and the external filter capacitance. Power Consumption, Enable and Power-On The quiescent current consumption of the AD8361 varies with the size of the input signal from about 1 mA for no signal up to 7 mA at an input level of 0.66 V rms (9.4 dBm, re 50 Ω). If the input is driven beyond this point, the supply current increases steeply (see Figure 16). There is little variation in quiescent current with power supply voltage. The AD8361 can be disabled either by pulling the PWDN (Pin 4) to VPOS or by simply turning off the power to the device. While turning off the device obviously eliminates the current consumption, disabling the device reduces the leakage current to less than 1 µA. Figure 27 and Figure 28 show the response of the output of the AD8361 to a pulse on the PWDN pin, with no capacitance and with a filter capacitance of 0.01 µF, respectively; the turn-on time is a function of the filter capacitor. Figure 31 shows a plot of the output response to the supply being turned on (i.e., PWDN is grounded and VPOS is pulsed) with a filter capacitor of 0.01 µF. Again, the turn-on time is strongly influenced by the size of the filter capacitor. If the input of the AD8361 is driven while the device is disabled (PWDN = VPOS), the leakage current of less than 1 µA increases as a function of input level. When the device is disabled, the output impedance increases to approximately 16 kΩ. Volts to dBm Conversion In many of the plots, the horizontal axis is scaled in both rms volts and dBm. In all cases, dBm are calculated relative to an impedance of 50 Ω. To convert between dBm and volts in a 50 Ω system, the following equations can be used. Figure 48 shows this conversion in graphical form. () () () ()2 2 20 10log W 0.001 Ω 50 10log dBm rms V rms V Power = ⎥ ⎥ ⎥ ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ ⎡ = () 20 /10 log 10 log Ω 50 W 0.001 1 1 dBm dBm rms V − − = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ × × = V rms dBm +20 +10 0 –10 –20 –30 –40 1 0.1 0.01 0.001 Figure 48. Conversion from dBm to rms Volts |
Numéro de pièce similaire - AD8361 |
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Description similaire - AD8361 |
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