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MC13852EP Fiches technique(PDF) 9 Page - Freescale Semiconductor, Inc |
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MC13852EP Fiches technique(HTML) 9 Page - Freescale Semiconductor, Inc |
9 / 30 page Applications Information MC13852 Advance Information, Rev. 2.0 Freescale Semiconductor 9 3.1 434 MHz Application This application was designed to provide typical NF = 1.65 dB, S21 gain = 20 dB, OIP3 =10.6 dBm at 434 MHz. Typical performance that can be expected from this circuit at 2.75 V is listed in Table 6. The component values can be changed to enhance the performance of a particular parameter, but usually at the expense of another. Two values of bias resistor R1 are shown to demonstrate performance for different IP3 and Icc requirements. • Values of external resistor R1 are varied to adjust Icc and IP3. • Inductor L3 provides bias to the logic circuit. Figure 7 is the 434 MHz application schematic with package pinouts and the circuit component topology. Figure 7. 434 MHz Application Schematic Table 6. Typical 434 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25 °C) Characteristic Symbol Min Typ Max Unit R1 = 1.2 k Ω Frequency f — 434 — MHz RF Gain High Gain Bypass G 19.3 -9.5 20.3 -8.5 — — dB Output Third Order Intercept Point High Gain Bypass OIP3 9.5 15.5 10.6 16.6 — — dBm Input Third Order Intercept Point High Gain Bypass IIP3 -10.7 24 -9.7 25.1 — — dBm Out Ref P1dB High Gain P1dBout 6.8 7.8 — dBm In Ref P1dB High Gain P1dBin -13.5 -12.5 — dBm RF OUT R2 30 ohm L1 27 nH C2 47 pF L2 47 nH C5 33 pF C4 0.1 uF Gain Vcc . Enable Rbias R1 1.2 kohm C3 22 pF 6 1 3 2 Logic 7 5 4 8 Emit C1 1.3 pF R3 82 ohm L3 270 nH |
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