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SI5338D-A-GMR Fiches technique(PDF) 7 Page - Silicon Laboratories |
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SI5338D-A-GMR Fiches technique(HTML) 7 Page - Silicon Laboratories |
7 / 170 page Si5338 Rev. 0.6 7 Phase Increment/Decrement Update Time PUPDATE Pin control2,3 MultiSynth output <18 MHz Number of periods of MultiSynth output frequency —12 — Periods Frequency Increment/ Decrement Step Size fSTEP R divider not used 1 — See Note 2 ppm Frequency Increment/ Decrement Range fRANGE R divider not used — — 3502 MHz Frequency Increment/ Decrement Update Time fUPDATE Pin control2,3 MultiSynth output >18 MHz 667 — — ns Frequency Increment/ Decrement Update Time fUPDATE Pin control2,3 MultiSynth output <18 MHz Number of periods of MultiSynth output frequency —12 — Periods Spread Spectrum PP Frequency Deviation SSDEV MultiSynth Output < ~Fvco/8 0.1 — 5.04 % Spread Spectrum Modulation Rate SSDEV MultiSynth Output < ~Fvco/8 30 — 635 kHz Table 6. Input and Output Clock Characteristics (VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Units Input Clock (AC Coupled Differential Input Clocks on Pins IN1/2, IN5/6) Frequency fIN 5 — 710 MHz Differential Voltage Swing VPP 710 MHz input 0.4 — 2.4 VPP Rise/Fall Time tR/tF 20%–80% — — 1.0 ns Duty Cycle1 DC < 1 ns tr/tf 40 — 60 % Notes: 1. For best jitter performance, keep the input slew rate on pins 1,2,5,6 faster than 0.3 V/ns 2. Not in PLL bypass mode. 3. For best jitter performance, keep the input single ended slew rate on pins 3 or 4 faster than 1 V/ns 4. Only two unique frequencies above 350 MHz can be simultaneously output, Fvco/4 and Fvco/6. 5. Includes effect of internal series 22 resistor. Table 5. Performance Characteristics (Continued) (VDD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. Outputs at integer-related frequencies and using the same driver format. See "3.9.3. Initial Phase Offset" on page 24. 2. The maximum step size is only limited by the register lengths; however, the MultiSynth output frequency must be kept between 5 MHz and Fvco/8. 3. Update rate via I2C is also limited by the time it takes to perform a write operation. 4. Default value is 0.5% down spread. 5. Default value is ~31.5 kHz. |
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