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CDK2307DILP64 Fiches technique(PDF) 5 Page - Cadeka Microcircuits LLC.

No de pièce CDK2307DILP64
Description  Dual, 20/40/65/80MSPS, 12/13-bit Analog-to-Digital Converters
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Fabricant  CADEKA [Cadeka Microcircuits LLC.]
Site Internet  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CDK2307DILP64 Fiches technique(HTML) 5 Page - Cadeka Microcircuits LLC.

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©2009 CADEKA Microcircuits LLC
www.cadeka.com
5
Data Sheet
Electrical Characteristics
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20/40/65/80MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, 13-bit output, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
No Missing Codes
Guaranteed
Offset Error
Midscale offset
1
LSB
Gain Error
Full scale range deviation from typical
-6
6
%FS
Gain Matching
Gain matching between channels. ±3 sigma
value at worst case conditions.
±0.5
%FS
DNL
Differential Non-Linearity
12-bit level
±0.2
LSB
INL
Integral Non-Linearity
12-bit level
±0.6
LSB
VCMO
Common Mode Voltage Output
VAVDD/2
V
Analog Input
VCMI
Input Common Mode
Analog input common mode voltage
VCM -0.1
VCM +0.2
V
VFSR
Full Scale Range, Normal
Differential input voltage range,
2.0
Vpp
Full Scale Range, Option
Differential input voltage range, 1V
(see section Reference Voltages)
1.0
Vpp
Input Capacitance
Differential input capacitance
2.0
pF
Bandwidth
Input bandwidth, full power
500
MHz
Power Supply
AVDD, DVDD
Core Supply Voltage
Supply voltage to all 1.8V domain pins.
See Pin Configuration and Description
1.7
1.8
2.0
V
OVDD
I/O Supply Voltage
Output driver supply voltage (OVDD).
Must be higher than or equal to Core Supply
Voltage (VOVDD
VDVDD)
1.7
2.5
3.6
V


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