BUK114-50L datasheet(9/13 Pages) NXP

No de pièce	BUK114-50L

Description	Logic level TOPFET

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Philips Semiconductors

Product specification

Logic level TOPFET

BUK114-50L/S

SMD version of BUK104-50L/S

Fig.16. Maximum drain source supply voltage for

SC load protection. V

DDP(P) = f(VIS); Tmb ≤ 150 ˚C

Fig.17. Minimum protection supply voltage

for SC load protection. V

PSP = f(VIS); Tmb ≥ 25 ˚C

Fig.18. Typical overload protection characteristics.

t

d sc = f(PDS); conditions: VPS ≥ VPSP; VIS ≥ 5 V

Fig.19. Typical overload protection characteristics.

Conditions: V

DD = 13 V; VPS = VPSN, VIS = 7 V; SC load

Fig.20. Typical overload protection energy, T

j = 25 ˚C

E

SC(TO) = f(VPS); conditions: VDS = 13 V, parameter VIS

Fig.21. Typical clamping characteristics, 25 ˚C.

I

D = f(VDS); conditions: RIS = 100 Ω; tp ≤ 50 µs

0

2

4

6

8

10

VIS / V

VDDP(P) / V

BUK114-50L/S

50

40

30

20

10

0

max

-60

-20

20

60

100

140

180

220

Tmb / C

BUK114-50L/S

0.5

0

Energy / J

Time / ms

Tj(TO)

Energy & Time

0.4

0.3

0.2

0.1

0

2

4

6

8

10

VIS / V

VPSP / V

BUK114-50L/S

10

8

6

4

2

0

min

BUK114-50L

BUK114-50S

0

2

4

6

8

10

VPS / V

ESC(TO) / J

BUK114-50L/S

0.4

0.3

0.2

0.1

0

BUK114-50L

BUK114-50S

VIS / V =

5

10

5

10

0.1

1

10

POWER / kW

TIME / ms

BUK114-50L/S

10

1

0.1

PDSM

50

60

70

BUK114-50L/S

VDS / V

ID / A

20

15

10

5

0

typ.

September 1996

9

Rev 1.000

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