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MAX1358B Fiches technique(PDF) 46 Page - Maxim Integrated Products |
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MAX1358B Fiches technique(HTML) 46 Page - Maxim Integrated Products |
46 / 71 page 16-Bit, Data-Acquisition System with ADC, DACs, UPIOs, RTC, Voltage Monitors, and Temp Sensor 46 ______________________________________________________________________________________ MSB SEC31 SEC30 SEC29 SEC28 SEC27 SEC26 SEC25 SEC24 SEC23 SEC22 SEC21 SEC20 SEC19 SEC18 SEC17 SEC16 SEC15 SEC14 SEC13 SEC12 SEC11 SEC10 SEC9 SEC8 SEC7 SEC6 SEC5 SEC4 SEC3 SEC2 SEC1 SEC0 LSB SUB7 SUB6 SUB5 SUB4 SUB3 SUB2 SUB1 SUB0 RTC Register (Power-On State: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000) The RTC register stores the 40-bit second and subsec- ond count of the respective time-of-day and system clocks. SEC<31:0>: The second bits store the time-of-day clock settings. It is a 32-bit binary counter with 1s reso- lution that can keep time for a span of over 136 years. Firmware in the µC can translate this time count to units that are meaningful to the system (i.e., translate to cal- endar time or as an elapsed time from some predefined time = 0, such as January 1, 2000). The RTC runs con- tinuously as long as RTCE = 1 (see the CLK_CNTL Register section) and does not stop for reads or writes. The counter increments when the subsecond counter overflows. Set RWE = 1 to enable writing to the RTC register. After writing to RWE, perform another write and set RTCE = 1 to enable the RTC. A 40-bit burst write operation, starting with SEC31 and finishing with SUB0 is required to set the RTC second and subsec- ond bits. If CS is brought high before the 40th rising SCLK edge, the write is aborted and the RTC contents are unchanged. The RTC register is loaded on the ris- ing SCLK edge of the 40th bit (SUB0). A 40-bit burst read operation, starting with SEC31 and finishing with SUB0, is required to retrieve the current RTC second and subsecond counts. The read command can be aborted prior to receiving the 40th bit (SUB0) by raising CS and any RTC data read to that point is valid. When the read command is received, a snapshot of a valid RTC second count is latched to avoid reading an erro- neous, transitioning RTC value. Due to the asynchro- nous nature of RTC reads, it is possible to have a maximum 1s error between the actual and reported times from the time-of-day clock. To prevent the data from changing during a read operation, complete reads of the RTC register in less than 1ms. The power-on default state is 0000 0000 hex. SUB<7:0>: The subsecond bits store the system clock. This 8-bit binary counter has 3.9ms resolution (1/256Hz) and a span of 1s. The subsecond counter increments in single counts from 00 hex to FF hex before rolling over again to 00 hex, at which time the RTC second counter (SEC<31:0>) increments. The RTC runs continuously (as long as RTCE = 1) and does not stop for reads or writes. A 256Hz clock, derived from the 32kHz crystal, increments this counter. Set the RWE = 1 bit to enable writing to the RTC register. After writing to RWE, perform another write, setting RTCE = 1, to enable the RTC. A 40-bit burst write operation, starting with SEC31 and fin- ishing with SUB0, is required to set the RTC second and subsecond bits. If CS is brought high before the 40th rising SCLK edge, the write is aborted and the RTC con- tents are unchanged. The RTC register is loaded on the rising SCLK edge of the 40th bit (SUB0). A 40-bit burst read operation, starting with SEC31 and finishing with SUB0, is required to retrieve the current RTC second and subsecond counts. The read command can be aborted prior to receiving the 40th bit (SUB0) by raising CS, and any RTC data read to that point is valid. When the read command is received, a snapshot of a valid RTC second count is latched to avoid reading an erro- neous, transitioning RTC value. Due to the asynchro- nous nature of RTC reads, it is possible to have a maximum 1s error between the actual and reported times from the time-of-day clock. To prevent the data from changing during a read operation, complete reads of the RTC registers occur in less than 1ms. The power- on default state is 00 hex. |
Numéro de pièce similaire - MAX1358B |
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Description similaire - MAX1358B |
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