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TS5N118PWR Fiches technique(PDF) 1 Page - Texas Instruments |
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TS5N118PWR Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 18 page www.ti.com FEATURES APPLICATIONS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 B4 B3 B2 B1 A NC OE GND VCC B5 B6 B7 B8 S0 S1 S2 DBQ OR PW PACKAGE (TOP VIEW) NC − No internal connection DESCRIPTION/ORDERING INFORMATION TS5N118 1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH SCDS205 – AUGUST 2005 • PCI Interface • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range • Differential Signal Interface (ron = 3 Ω Typ) • Memory Interleaving • 0- to 10-V Switching on Data I/O Ports • Bus Isolation • Low-Distortion Signal Gating • Bidirectional Data Flow With Near-Zero Propagation Delay • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port) • VCC Operating Range From 4.75 V to 5.25 V • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) • Supports Both Digital and Analog Applications The TS5N118 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N118 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. The TS5N118 is a 1-of-8 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S0, S1, S2) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP (QSOP) – DBQ Tape and reel TS5N118DBQR –40 °C to 85°C YB118 TSSOP – PW Tape and reel TS5N118PWR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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