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BUK663R5-55C Fiches technique(PDF) 3 Page - NXP Semiconductors |
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BUK663R5-55C Fiches technique(HTML) 3 Page - NXP Semiconductors |
3 / 11 page BUK663R5-55C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Objective data sheet Rev. 01 — 3 August 2010 3 of 11 NXP Semiconductors BUK663R5-55C N-channel TrenchMOS FET 4. Limiting values [1] Continuous current is limited by package. [2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [3] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [4] Refer to application note AN10273 for further information. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VGS gate-source voltage -20 20 V ID drain current Tmb =25°C; VGS =10V; see Figure 1 [1] - 100 A Tmb =100 °C; VGS = 10 V; see Figure 1 [1] - 100 A IDM peak drain current Tmb =25°C; tp ≤ 10 µs; pulsed - 757 A Ptot total power dissipation Tmb =25°C; see Figure 2 - 263 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb =25°C [1] - 100 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 757 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID =100 A; Vsup ≤ 55 V; RGS =50 Ω; VGS =10V; Tj(init) = 25 °C; unclamped - 551 mJ EDS(AL)R repetitive drain-source avalanche energy [2][3][4] --J Fig 1. Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aac796 0 40 80 120 160 200 0 50 100 150 200 Tmb (°C) ID (A) (1) Tmb (°C) 0 200 150 50 100 03na19 40 80 120 Pder (%) 0 |
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