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TPA2028D1YZFT Fiches technique(PDF) 2 Page - Texas Instruments |
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TPA2028D1YZFT Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 37 page OUT + OUT - PGND PVDD IN + IN - SDA EN SCL Volume Control 1 F m ICEnable Power Stage AGC Reference Biasand References AGC I CInterface 2 Differential Input CIN I CInterface andControl 2 Class-D Modulator IN- PGND EN OUT+ PVDD OUT- SCL IN+ SDA C1 C2 C3 B1 B3 B2 A1 A2 A3 YZF(WCSP)PACKAGE (TOP VIEW) TPA2028D1 SLOS660 – JANUARY 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM DEVICE PINOUT 2 Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPA2028D1 |
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