Moteur de recherche de fiches techniques de composants électroniques |
|
DAC7728SPAG Fiches technique(PDF) 5 Page - Texas Instruments |
|
|
DAC7728SPAG Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 54 page DAC7728 www.ti.com SBAS461A – JUNE 2009 – REVISED NOVEMBER 2009 ELECTRICAL CHARACTERISTICS: Dual-Supply (continued) All specifications at TA = TMIN to TMAX, AVDD = +16.5V, AVSS = –16.5V, DVDD = +5V, REF-A and REF-B = +5V, gain = 6, AGND-x = DGND = 0V, and Offset DAC A and Offset DAC B are at default values (1), unless otherwise noted. DAC7728 PARAMETER CONDITIONS MIN TYP MAX UNIT OFFSET DAC OUTPUT(14) (15) Voltage output VREF = +5V 0 5 V Full-scale error TA = +25°C ±0.25 LSB Zero-code error TA = +25°C ±0.25 LSB Linearity error ±0.5 LSB Differential linearity error ±1 LSB ANALOG MONITOR PIN (VMON) Output impedance(16) TA = +25°C 2000 Ω Three-state leakage current 100 nA REFERENCE INPUT Reference input voltage range(17) 1.0 5.5 V Reference input dc impedance 10 M Ω Reference input capacitance 10 pF DIGITAL INPUT(14) IOVDD = +4.5V to +5.5V 3.8 0.3 + IOVDD V High-level input voltage, VIH IOVDD = +2.7V to +3.3V 2.3 0.3 + IOVDD V IOVDD = +1.7V to +2.0V 1.5 0.3 + IOVDD V IOVDD = +4.5V to +5.5V –0.3 0.8 V Low-level input voltage, VIL IOVDD = +2.7V to +3.3V –0.3 0.6 V IOVDD = +1.7V to +2.0V –0.3 0.3 V CLR, LDAC, RST, A0 to A4, R/W, and CS ±1 μA Input current USB/BTC, RSTSEL, and D0 to D11 ±5 μA CLR, LDAC, RST, A0 to A4, R/W, and CS 5 pF Input capacitance USB/BTC, RSTSEL, and D0 to D11 12 pF GPIO 14 pF DIGITAL OUTPUT(14) IOVDD = +2.7V to +5.5V, sourcing 1mA IOVDD – 0.4 IOVDD V High-level output voltage, VOH (D0 to D11) IOVDD = +1.8V, sourcing 200μA 1.6 IOVDD V IOVDD = +2.7V to +5.5V, sinking 1mA 0 0.4 V Low-level output voltage, VOL (D0 to D11, BUSY, and GPIO) IOVDD = +1.8V, sinking 200μA 0 0.2 V High-impedance leakage current D0 to D11, BUSY, and GPIO ±5 μA High-impedance output BUSY and GPIO 14 pF capacitance (14) Specified by design. (15) Offset DAC A and Offset DAC B are trimmed in manufacturing to minimize the error for symmetrical output. The default value may vary no more than ±1 LSB from the nominal number listed in Table 8. These pins are not intended to drive an external load, and must not be connected during dual-supply operation. (16) 8000 Ω when VMON is connected to Reference Buffer A or B. (17) Reference input voltage ≤ DVDD. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): DAC7728 |
Numéro de pièce similaire - DAC7728SPAG |
|
Description similaire - DAC7728SPAG |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |