N01L63W2AT5I datasheet(4/10 Pages) ONSEMI

No de pièce	N01L63W2AT5I

Description	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit

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Fabricant	ONSEMI [ON Semiconductor]

Site Internet	http://www.onsemi.com

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4 / 10 page

Rev.

9 | Page 4 of 10 | www.onsemi.com

N01L63W2A

Power Savings with Page Mode Operation (WE = VIH)

Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal

organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power

saving feature.

The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open

and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant

bits and addressing the 16 words within the open page, power is reduced to the page mode value which is

considerably lower than standard operating currents for low power SRAMs.

Page Address (A4 - A15)

LB, UB

OE

CE1

CE2

Word Address (A0 - A3)

Open page

Word 1

Word 2

Word 16

Numéro de pièce similaire - N01L63W2AT5I

Fabricant	No de pièce	Fiches technique	Description
ON Semiconductor	N01L63W3A	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9
	N01L63W3AB25I	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9
	N01L63W3AB25IT	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9
	N01L63W3AB5I	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9
	N01L63W3AB5IT	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9

Fabricant	No de pièce	Fiches technique	Description
ON Semiconductor	N01L63W3A	647Kb / 10P	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K 횞 16 bit July 2008 - Rev. 9
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