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CAT28LV65WA-15T Fiches technique(PDF) 8 Page - ON Semiconductor

No de pièce CAT28LV65WA-15T
Description  64 kb CMOS Parallel EEPROM
Download  15 Pages
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT28LV65WA-15T Fiches technique(HTML) 8 Page - ON Semiconductor

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CAT28LV65
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DATA Polling
DATA polling is provided to indicate the completion of
write cycle. Once a byte write or page write cycle is initiated,
attempting to read the last byte written will output the
complement of that data on I/O7 (I/O0–I/O 6 are
indeterminate) until the programming cycle is complete.
Upon completion of the self−timed write cycle, all I/O’s will
output true data during a read cycle.
Toggle Bit
In addition to the DATA Polling feature, the device offers
an additional method for determining the completion of a
write cycle. While a write cycle is in progress, reading data
from the device will result in I/O6 toggling between one and
zero. However, once the write is complete, I/O6 stops
toggling and valid data can be read from the device.
Ready/BUSY (RDY/BUSY)
The RDY/BUSY pin is an open drain output which
indicates device status during programming. It is pulled low
during the write cycle and released at the end of
programming. Several devices may be OR−tied to the same
RDY/BUSY line.
Figure 8. DATA Polling
ADDRESS
I/O7
WE
OE
CE
DIN = X
DOUT = X
DOUT = X
tOEH
tOE
tWC
tOES
Figure 9. Toggle Bit
WE
OE
I/O6
CE
tOEH
tOE
tWC
tOES
(Note 13)
(Note 13)
13.Beginning and ending state of I/O6 is indeterminate.


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