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CAT28C17AGA-20T Fiches technique(PDF) 6 Page - ON Semiconductor |
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CAT28C17AGA-20T Fiches technique(HTML) 6 Page - ON Semiconductor |
6 / 12 page CAT28C17A http://onsemi.com 6 DEVICE OPERATION Read Data stored in the CAT28C17A is transferred to the data bus when WE is held high, and both OE and CE are held low. The data bus is set to a high impedance state when either CE or OE goes high. This 2−line control architecture can be used to eliminate bus contention in a system environment. Ready/BUSY (RDY/BUSY) The RDY/BUSY pin is an open drain output which indicates device status during programming. It is pulled low during the write cycle and released at the end of programming. Several devices may be OR−tied to the same RDY/BUSY line. Figure 4. Read Cycle ADDRESS DATA OUT DATA VALID DATA VALID HIGH−Z tOHZ tHZ tAA tOH tOE tOLZ tCE tLZ tRC VIH CE OE WE ADDRESS DATA VALID HIGH−Z Figure 5. Byte Write Cycle [WE Controlled] CE OE WE RDY/BUSY DATA OUT DATA IN tDL tDB tOEH tWP tCH tDH tDS tWC tCS tAH tAS tOES |
Numéro de pièce similaire - CAT28C17AGA-20T |
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Description similaire - CAT28C17AGA-20T |
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