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SN74SSQE32882ZALR Fiches technique(PDF) 2 Page - Texas Instruments

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No de pièce SN74SSQE32882ZALR
Description  28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS PARITY TEST ONE PAIR TO FOUR PAIR DIFFERENTIAL CLOCK PLL DRIVER
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

SN74SSQE32882ZALR Fiches technique(HTML) 2 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
SN74SSQE32882
SCAS857A – MARCH 2008 – REVISED OCTOBER 2008 ................................................................................................................................................. www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
ORDERABLE
TOP-SIDE
TCASE
PACKAGE(2)
PART NUMBER
MARKING
0°C - Tcase
176ZAL
Tape and Reel
SN74SSQE32882ZALR
TE32882E
(see Table 1)
176ZCJ
Tape and Reel
SN74SSQE32882ZCJR
TE32882E
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Over operating free-air temperature range (unless otherwise noted).
(1)
PARAMETER
VALUE
UNIT
VDD
Supply voltage
–0.4 to +1.975
V
VI
Receiver input voltage
See (2) and (3)
–0.4 to VDD + 0.5
V
VREF
Reference voltage
–0.4 to VDD + 0.5
V
VO
Driver output voltage
See (2) and (3)
–0.4 to VDD + 0.5
V
IIK
Input clamp current
VI < 0 or VI > VDD
–50
mA
IOK
Output clamp current
VO < 0 or VO > VDD
±50
mA
IO
Continuous output current
0 < VO < VDD
±50
mA
ICCC
Continuous current through each VDD or GND pin
±100
mA
Tstg
Storage temperature
–65 to +150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
This value is limited to 2.2 V maximum.
Table 1. Case Temperature vs Speed Node
PARAMETER
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
UNIT
Tcase
Maximum case temperature (1)
+109
+108
+106
+103
°C
(1)
The temperature values fit to JEDEC RAW cards A, B, and C. The user must keep Tcase below the specified values in order to keep the
junction temperature below +125°C. Other combinations of features and termination resistors can require lower case temperature and
extra cooling. These combinations depend on the specific application.
2
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Copyright © 2008, Texas Instruments Incorporated


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