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CS35L01-CWZR Fiches technique(PDF) 9 Page - Cirrus Logic |
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CS35L01-CWZR Fiches technique(HTML) 9 Page - Cirrus Logic |
9 / 34 page CS35L01/03 DS909A2 9 ELECTRICAL CHARACTERISTICS - ALL OPERATIONAL MODES Note: 6. No external loads should be connected to the LFILT+ net. Any connection of a load to this point may result in errant operation or performance degradation in the device. 7. When VBATT is below this threshold (VBLIM), operation is automatically restricted to SD mode. 8. When operating in HD or FHD mode and the differential input voltage remains below the input level threshold (VIN-LDO) for a period of time (tLDO), the PWM outputs will be powered by the internally generated LDO supply (VLDO). 9. When operating in HD or FHD mode and the differential input voltage is above this input level threshold (VIN-VBATT), the PWM outputs will powered directly from the VBATT supply. 10. Refer to Section 5.5 for more information on Thermal Error functionality. Parameters Symbol Test Conditions Min Typ Max Units Max. Current from LFILT+ (Note 6) ILFILT+ -10 - μA LFILT+ Output Impedance ZLFILT+ -0.7 - Ω VBATT Limit for HD/FHD Mode (Note 7) VBLIM -3.0 - VDC Input Level for Entering LDO Operation in HD/FHD Modes (Note 8) VIN-LDO CS35L03 CS35L01 - - 0.014•VBATT 0.027•VBATT - - Vrms Vrms Input Level for Entering VBATT Operation in HD/FHD Modes (Note 9) VIN-VBATT CS35L03 CS35L01 - - 0.09 0.18 - - Vrms Vrms LDO Entry Time Delay tLDO - 800 - ms LDO Level for HD/FHD Modes VLDO - 1.0 - V Output Offset Voltage VOFFSET Inputs AC coupled to GND -+/-2 - mV Amplifier Gain AV CS35L03 CS35L01 - - 12 6 - - dB dB Shutdown Supply Current IA(SD) SD = Low -0.05 - μA MOSFET On Resistance RDS(ON) Ibias = 0.5 A - 270 - m Ω Thermal Error Threshold (Note 10) TTE - 150 - °C Thermal Error Retry Time (Note 10) RTE - 100 - ms Under Voltage Lockout Threshold UVLO - 1.9 - V Total Group Delay GD - 10 - μs Operating Efficiency η Output Levels at 10% THD+N VBATT = 5 VDC - 90 - % VBATT = 3.7 VDC - 89 - % VBATT = 5 VDC - 84 - % VBATT = 3.7 VDC - 82 - % |
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