CDCLVP1212

SCAS886A – AUGUST 2009 – REVISED MAY 2010

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGED DEVICES

FEATURES

CDCLVP1212RHAT

40-pin QFN (RHA) package, small tape and reel

–40°C to +85°C

CDCLVP1212RHAR

40-pin QFN (RHA) package, tape and reel

(1)

For the most current specifications and package information, see the Package Option Addendum located at the end of this data sheet or

refer to our web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating free-air temperature range (unless otherwise noted).

CDCLVP1212

UNIT

–0.5 to 4.6

V

V

V

Input current

20

mA

Output current

50

mA

Specified free-air temperature range (no airflow)

–40 to +85

°C

Storage temperature range

–65 to +150

°C

Maximum junction temperature

+125

°C

ESD

Electrostatic discharge (HBM)

2

kV

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to

absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All supply voltages must be supplied simultaneously.

(3)

The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

Over operating free-air temperature range (unless otherwise noted).

CDCLVP1212

PARAMETER

MIN

TYP

MAX

UNIT

Supply voltage

2.375

2.50/3.30

3.60

V

Ambient temperature

–40

+85

°C

PACKAGE DISSIPATION RATINGS

(1) (2)

VALUE

TEST

4 × 4 VIAS

PARAMETER

CONDITIONS

ON PAD

UNIT

0 LFM

36.1

°C/W

Thermal resistance, junction-to-ambient

150 LFM

30.2

°C/W

400 LFM

28.2

°C/W

(3)

Thermal resistance, junction-to-pad

3.58

°C/W

(1)

The package thermal resistance is calculated in accordance with JESD 51 and JEDEC 2S2P (high-K board).

(2)

Connected to GND with 16 thermal vias (0.3-mm diameter).

(3)

package.

2

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