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CS495314-CVZ Fiches technique(PDF) 3 Page - Cirrus Logic |
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CS495314-CVZ Fiches technique(HTML) 3 Page - Cirrus Logic |
3 / 36 page CS4953xx Data Sheet 32-bit Audio Decoder DSP Family DS705PP6 Copyright 2009 Cirrus Logic 3 9. Package Mechanical Drawings ..............................................................................................33 9.1 128-pin LQFP Package Drawing ............................................................................................................ 33 9.2 144-pin LQFP Package Drawing ............................................................................................................ 34 10. Revision History ....................................................................................................................35 List of Figures Figure 1. RESET Timing ........................................................................................................................................12 Figure 2. XTI Timing ..............................................................................................................................................12 Figure 3. Serial Control Port - SPI Slave Mode Timing ..........................................................................................14 Figure 4. Serial Control Port - SPI Master Mode Timing ........................................................................................15 Figure 5. Serial Control Port - I2C Slave Mode Timing ..........................................................................................16 Figure 6. Serial Control Port - I2C Master Mode Timing ........................................................................................17 Figure 7. Parallel Control Port - Intel® Slave Mode Read Cycle ............................................................................19 Figure 8. Parallel Control Port - Intel Slave Mode Write Cycle ..............................................................................19 Figure 9. Parallel Control Port - Motorola® Slave Mode Read Cycle Timing .........................................................21 Figure 10. Parallel Control Port - Motorola Slave Mode Write Cycle Timing .........................................................21 Figure 11. Digital Audio Input (DAI) Port Timing Diagram .....................................................................................22 Figure 12. DSD® Serial Audio Input Timing ...........................................................................................................23 Figure 13. Digital Audio Port Output Timing Master Mode .....................................................................................24 Figure 14. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK) ...........................................25 Figure 15. External Memory Interface - SDRAM Burst Read Cycle .......................................................................26 Figure 16. External Memory Interface - SDRAM Burst Write Cycle .......................................................................26 Figure 17. External Memory Interface - SDRAM Auto Refresh Cycle ....................................................................27 Figure 18. External Memory Interface - SDRAM Load Mode Register Cycle ........................................................27 Figure 19. 128-pin LQFP Pin-Out Drawing (CS495303/CS495313) ......................................................................30 Figure 20. 128-pin LQFP Pin-Out Drawing (CS495304/CS495314) ......................................................................31 Figure 21. 144-pin LQFP Pin-Out Drawing (CS495313) ........................................................................................32 Figure 22. 128-pin LQFP Package Drawing .........................................................................................................33 Figure 23. 144-pin LQFP Package Drawing .........................................................................................................34 List of Tables Table 1. CS4953xx Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Table 2. Device and Firmware Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. CS49530x DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. CS49531x DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6. Environmental, Manufacturing, and Handling Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 7. 128-pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 8. 144-pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 |
Numéro de pièce similaire - CS495314-CVZ |
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Description similaire - CS495314-CVZ |
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