Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

ADC1005S060 Fiches technique(PDF) 9 Page - NXP Semiconductors

No de pièce ADC1005S060
Description  Single 10 bits ADC, up to 60 MHz
Download  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

ADC1005S060 Fiches technique(HTML) 9 Page - NXP Semiconductors

Back Button ADC1005S060 Datasheet HTML 5Page - NXP Semiconductors ADC1005S060 Datasheet HTML 6Page - NXP Semiconductors ADC1005S060 Datasheet HTML 7Page - NXP Semiconductors ADC1005S060 Datasheet HTML 8Page - NXP Semiconductors ADC1005S060 Datasheet HTML 9Page - NXP Semiconductors ADC1005S060 Datasheet HTML 10Page - NXP Semiconductors ADC1005S060 Datasheet HTML 11Page - NXP Semiconductors ADC1005S060 Datasheet HTML 12Page - NXP Semiconductors ADC1005S060 Datasheet HTML 13Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 19 page
background image
ADC1005S060_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 August 2008
9 of 19
NXP Semiconductors
ADC1005S060
Single 10 bits ADC, up to 60 MHz
[1]
The rise and fall times of the clock signal must not be less than 0.5 ns.
[2]
The input admittance is
[3]
Analog input voltages producing code 0 up to and including code 1023:
a) Voffset BOTTOM is the difference between the analog input which produces data equal to 00 and the reference voltage on pin RB
(VRB) at Tamb = 25 °C.
b) Voffset TOP is the difference between the reference voltage on pin RT (VRT) and the analog input which produces data outputs equal
to code 1023 at Tamb = 25 °C.
[4]
To ensure the optimum linearity performance of such a converter architecture the lower and upper extremities of the converter reference
resistor ladder are connected to pins RB and RT via offset resistors ROB and ROT as shown in Figure 3.
a) The current flowing into the resistor ladder is
and the full-scale input range at the converter, to cover code 0
to 1023 is
b) Since RL, ROB and ROT have similar behavior with respect to process and temperature variation, the ratio
will be kept reasonably constant from device to device. Consequently, variation of the output codes at a given input voltage depends
mainly on the difference VRT − VRB and its variation with temperature and supply voltage. When several ADCs are connected in
parallel and fed with the same reference source, the matching between each of them is optimized.
[5]
[6]
The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater
than 2 LSB, neither any significant attenuation are observed in the reconstructed signal.
[7]
The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square
wave signal) in order to sample the signal and obtain correct output data.
[8]
Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental
period. The calculation takes into account all harmonics and noise up to half the clock frequency (Nyquist frequency). Conversion to
signal-to-noise ratio: S/N = ENOB
× 6.02 + 1.76 dB.
[9]
Intermodulation measured relative to either tone with analog input frequencies of 4.3 MHz and 4.5 MHz. The two input signals have the
same amplitude and the total amplitude of both signals provides full-scale to the converter.
[10] Output data acquisition: the output data is available after the maximum delay time of td(o). NXP recommends the lowest possible output
load. These parameters are guaranteed by characterization and not by production test.
CL
load capacitance
-
-
10
pF
SR
slew rate
VCCO = 2.7 V
0.2
0.3
-
V/ns
3-state output delay times (fclk = 60 MHz; VCCO = 3.3 V); see Figure 5
tdZH
float to active
HIGH delay time
-
1620ns
tdZL
float to active
LOW delay time
-
3034ns
tdHZ
active HIGH to
float delay time
-
2530ns
tdLZ
active LOW to
float delay time
-
2327ns
Table 6.
Characteristics …continued
VCCA = 4.75 V to 5.25 V; VCCD = 4.75 V to 5.25 V; AGND and DGND shorted together; Tamb =0 °Cto70 °C; typical values
measured at VCCA = VCCD = 5 V; VCCO = 3.3 V; VRB = 1.3 V; VRT = 3.7 V; CL = 10 pF and Tamb =25 °C unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Y
i
1
R
i
-----
j
ωC
i
++
I
V
RT
V
RB
R
OB
R
L
R
OT
++
----------------------------------------
=
V
I
R
L
I
L
×
R
L
R
OB
R
L
R
OT
++
----------------------------------------
V
RT
V
RB
+
()
×
0.8375
V
RT
V
RB
()
×
==
=
R
L
R
OB
R
L
R
OT
++
----------------------------------------
E
G
V
1023
V
0
() V
ip
p
()
V
ip
p
()
---------------------------------------------------------
100
×
=


Numéro de pièce similaire - ADC1005S060

FabricantNo de pièceFiches techniqueDescription
logo
Integrated Device Techn...
ADC1005S060 IDT-ADC1005S060 Datasheet
436Kb / 18P
   Single 10 bits ADC, up to 60 MHz
logo
Renesas Technology Corp
ADC1005S060 RENESAS-ADC1005S060 Datasheet
440Kb / 18P
   Single 10 bits ADC, up to 60 MHz
2 July 2012
logo
Integrated Device Techn...
ADC1005S060TS IDT-ADC1005S060TS Datasheet
436Kb / 18P
   Single 10 bits ADC, up to 60 MHz
More results

Description similaire - ADC1005S060

FabricantNo de pièceFiches techniqueDescription
logo
Renesas Technology Corp
ADC1005S060 RENESAS-ADC1005S060 Datasheet
440Kb / 18P
   Single 10 bits ADC, up to 60 MHz
2 July 2012
logo
Integrated Device Techn...
ADC1005S060 IDT-ADC1005S060 Datasheet
436Kb / 18P
   Single 10 bits ADC, up to 60 MHz
logo
Renesas Technology Corp
ADC1002S020 RENESAS-ADC1002S020 Datasheet
429Kb / 18P
   Single 10 bits ADC, up to 20 MHz
2 July 2012
logo
NXP Semiconductors
ADC1002S020 NXP-ADC1002S020 Datasheet
127Kb / 19P
   Single 10 bits ADC, up to 20 MHz
Rev. 02-13 August 2008
logo
Integrated Device Techn...
ADC1002S020 IDT-ADC1002S020 Datasheet
426Kb / 18P
   Single 10 bits ADC, up to 20 MHz
logo
NXP Semiconductors
ADC1006S055 NXP-ADC1006S055 Datasheet
393Kb / 31P
   Single 10 bits ADC, up to 55 MHz or 70 MHz
Rev. 02-12 August 2008
logo
Integrated Device Techn...
ADC1006S055 IDT-ADC1006S055 Datasheet
817Kb / 30P
   Single 10 bits ADC, up to 55 MHz or 70 MHz
logo
Renesas Technology Corp
ADC1006S055 RENESAS-ADC1006S055 Datasheet
820Kb / 30P
   Single 10 bits ADC, up to 55 MHz or 70 MHz
2 July 2012
logo
NXP Semiconductors
ADC1004S030 NXP-ADC1004S030 Datasheet
140Kb / 19P
   Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Rev. 03-7 August 2008
logo
Integrated Device Techn...
ADC1004S030 IDT-ADC1004S030 Datasheet
473Kb / 18P
   Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com