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74LVC3G14 Fiches technique(PDF) 1 Page - NXP Semiconductors |
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74LVC3G14 Fiches technique(HTML) 1 Page - NXP Semiconductors |
1 / 18 page 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features I Wide supply voltage range from 1.65 V to 5.5 V I 5 V tolerant input/output for interfacing with 5 V logic I High noise immunity I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I ±24 mA output drive (VCC = 3.0 V) I CMOS low power consumption I Latch-up performance exceeds 250 mA I Direct interface with TTL levels I Unlimited rise and fall times I Multiple package options I Specified from −40 °C to +85 °C and −40 °C to +125 °C. 3. Applications I Wave and pulse shaper for highly noisy environment I Astable multivibrator I Monostable multivibrator. 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 07 — 12 June 2008 Product data sheet |
Numéro de pièce similaire - 74LVC3G14_08 |
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Description similaire - 74LVC3G14_08 |
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