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74LVC1G126 Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74LVC1G126 Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 16 page 74LVC1G126_8 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 08 — 9 April 2009 2 of 16 NXP Semiconductors 74LVC1G126 Bus buffer/line driver; 3-state 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G126GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74LVC1G126GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753 74LVC1G126GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74LVC1G126GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 Table 2. Marking codes Type number Marking[1] 74LVC1G126GW VN 74LVC1G126GV V26 74LVC1G126GM VN 74LVC1G126GF VN Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram mna125 A OE Y 2 1 4 mna126 1 4 OE 2 mna127 OE A Y |
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