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74HCT3G14 Fiches technique(PDF) 10 Page - NXP Semiconductors |
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74HCT3G14 Fiches technique(HTML) 10 Page - NXP Semiconductors |
10 / 18 page 74HC_HCT3G14_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 8 May 2009 10 of 18 NXP Semiconductors 74HC3G14; 74HCT3G14 Triple inverting Schmitt trigger Test data is given in Table 11. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 11. Test circuit for measuring switching times VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aad983 DUT VCC VCC VI VO RT RL S1 CL open G Table 11. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC3G14 GND to VCC ≤ 6 ns 50 pF 1 k Ω open 74HCT3G14 GND to 3.0 V ≤ 6 ns 50 pF 1 k Ω open |
Numéro de pièce similaire - 74HCT3G14 |
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Description similaire - 74HCT3G14 |
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