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74AVCH1T45 Fiches technique(PDF) 11 Page - NXP Semiconductors

No de pièce 74AVCH1T45
Description  Dual supply translating transceiver; 3-state
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AVCH1T45 Fiches technique(HTML) 11 Page - NXP Semiconductors

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74AVCH1T45_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 5 May 2009
11 of 22
NXP Semiconductors
74AVCH1T45
Dual supply translating transceiver; 3-state
[1]
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
ten is a calculated value using the formula shown in Section 13.4 “Enable times”
Table 11.
Dynamic characteristics for temperature range
−40 °C to +85 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6.
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V
± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
propagation
delay
A to B
1.0
9.0
0.7
6.8
0.6
6.1
0.5
5.7
0.5
6.1
ns
B to A
1.0
9.0
0.8
8.0
0.7
7.7
0.6
7.2
0.5
7.1
ns
tdis
disable time
DIR to A
2.2
8.8
2.2
8.8
2.2
8.8
2.2
8.8
2.2
8.8
ns
DIR to B
2.2
8.4
1.8
6.7
2.0
6.9
1.7
6.2
2.4
7.2
ns
ten
enable time
DIR to A
-
17.4
-
14.7
-
14.6
-
13.4
-
14.3
ns
DIR to B
-
17.8
-
15.6
-
14.9
-
14.5
-
14.9
ns
VCC(A) = 1.4 V to 1.6 V
tpd
propagation
delay
A to B
1.0
8.0
0.7
5.4
0.6
4.6
0.5
3.7
0.5
3.5
ns
B to A
1.0
6.8
0.8
5.4
0.7
5.1
0.6
4.7
0.5
4.5
ns
tdis
disable time
DIR to A
1.6
6.3
1.6
6.3
1.6
6.3
1.6
6.3
1.6
6.3
ns
DIR to B
2.0
7.6
1.8
5.9
1.6
6.0
1.2
4.8
1.7
5.5
ns
ten
enable time
DIR to A
-
14.4
-
11.3
-
11.1
-
9.5
-
10.0
ns
DIR to B
-
14.3
-
11.7
-
10.9
-
10.0
-
9.8
ns
VCC(A) = 1.65 V to 1.95 V
tpd
propagation
delay
A to B
1.0
7.7
0.6
5.1
0.5
4.3
0.5
3.4
0.5
3.1
ns
B to A
1.0
6.1
0.7
4.6
0.5
4.4
0.5
3.9
0.5
3.7
ns
tdis
disable time
DIR to A
1.6
5.5
1.6
5.5
1.6
5.5
1.6
5.5
1.6
5.5
ns
DIR to B
1.8
7.8
1.8
5.7
1.4
5.8
1.0
4.5
1.5
5.2
ns
ten
enable time
DIR to A
-
13.9
-
10.3
-
10.2
-
8.4
-
8.9
ns
DIR to B
-
13.2
-
10.6
-
9.8
-
8.9
-
8.6
ns
VCC(A) = 2.3 V to 2.7 V
tpd
propagation
delay
A to B
1.0
7.2
0.5
4.7
0.5
3.9
0.5
3.0
0.5
2.6
ns
B to A
1.0
5.7
0.6
3.8
0.5
3.4
0.5
3.0
0.5
2.8
ns
tdis
disable time
DIR to A
1.5
4.2
1.5
4.2
1.5
4.2
1.5
4.2
1.5
4.2
ns
DIR to B
1.7
7.3
2.0
5.2
1.5
5.1
0.6
4.2
1.1
4.8
ns
ten
enable time
DIR to A
-
13.0
-
9.0
-
8.5
-
7.2
-
7.6
ns
DIR to B
-
11.4
-
8.9
-
8.1
-
7.2
-
6.8
ns
VCC(A) = 3.0 V to 3.6 V
tpd
propagation
delay
A to B
1.0
7.1
0.5
4.5
0.5
3.7
0.5
2.8
0.5
2.4
ns
B to A
1.0
6.1
0.6
3.6
0.5
3.1
0.5
2.6
0.5
2.4
ns
tdis
disable time
DIR to A
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
1.5
4.7
ns
DIR to B
1.7
7.2
0.7
5.5
0.6
5.5
0.7
4.1
1.7
4.7
ns
ten
enable time
DIR to A
-
13.3
-
9.1
-
8.6
-
6.7
-
7.1
ns
DIR to B
-
11.8
-
9.2
-
8.4
-
7.5
-
7.1
ns


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