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74AUP2GU04 Fiches technique(PDF) 1 Page - NXP Semiconductors |
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74AUP2GU04 Fiches technique(HTML) 1 Page - NXP Semiconductors |
1 / 16 page 1. General description The 74AUP2GU04 provides two unbuffered inverting gates. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. 2. Features I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I ESD protection: N HBM JESD22-A114E Class 3A exceeds 5000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Low static power consumption; ICC = 0.9 µA (maximum) I Latch-up performance exceeds 100 mA per JESD 78 Class II I Inputs accept voltages up to 3.6 V I Multiple package options I Specified from −40 °Cto+85 °C and −40 °C to +125 °C 3. Ordering information 74AUP2GU04 Low-power dual unbuffered inverter Rev. 02 — 3 July 2009 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2GU04GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP2GU04GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74AUP2GU04GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 |
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