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BU7839GVW Fiches technique(PDF) 4 Page - Rohm |
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BU7839GVW Fiches technique(HTML) 4 Page - Rohm |
4 / 16 page 4 / 15 ●Block diagram 2wire CPU I/F Audio I/F Interpolator ΔΣ Modulator Level Shifter Interpolator ΔΣ Modulator Level Shifter Register Power on/off control MCLK BCLK LRCLK SDI SCL SDA DVDD DVSS ADR TEST PLL REFCLK DVDDIO DVSSIO 12MHz in VDD_R OUT_R VSS_R VDD_L OUT_L VSS_L PLLCAP PLLVDD DVSS MUTE_R MUTE_L 256fs NRST Fig. 4 Block diagram ●Description of each block ● 2wire CPU I/F Interface with CPU, 2-wire control Write/read possible Device address is 2-address selectable (33h,36h) with ADR terminal ● Register This LSI is controlled all by register Write/read by 2wire CPU I/F ● Audio I/F Compatible with three modes of full front, full back and IIS Sampling frequency compatible with 8kHz~48kHz ● Interpolator,ΔΣModulator Variable over sampling, Order-variable ΔΣ modulator Optimum value is selected internally and automatically ● Level Shifter Level conversion in 3V series of analogue output Built-in mute transistor for start-up sound reduction ● PLL REFCLK terminal is taken as reference clock and 256fs is created It becomes the default setting when 12MHz is inputted to REFCLK Please change each setting if any frequency other than 12MHz is inputted to REFCLK |
Numéro de pièce similaire - BU7839GVW |
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Description similaire - BU7839GVW |
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