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US3027 Fiches technique(PDF) 5 Page - UNISEM

No de pièce US3027
Description  5 BIT PROGRAMMABLE SYNCHRONOUS BUCK PLUS TRIPPLE LDO CONTROLLER
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US3027 Fiches technique(HTML) 5 Page - UNISEM

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US3027
4-5
Rev. 1.3
12/8/00
Pin Description
This pin is internally connected to the undervoltage and overvoltage comparators sensing
the Vcore status. It must be connected directly to the Vcore supply.
This pin provides the feedback for the AGP linear regulator. The Select pin when con-
nected to the "Type Detect" pin of the AGP slot automatically selects the right voltage for
the AGP Vddq.
This pin controls the gate of an external MOSFET for the 1.8V chip set linear regulator.
This pin is connected to the Drain of the power MOSFET of the Core supply and it
provides the positive sensing for the internal current sensing circuitry. An external resis-
tor programs the C.S threshold depending on the Rds of the power MOSFET. An external
capacitor is placed in parallel with the programming resistor to provide high frequency
noise filtering.
This pin is connected to the Source of the power MOSFET for the Core supply and it
provides the negative sensing for the internal current sensing circuitry.
This pin provides the soft start for all the regulators. An internal current source charges
an external capacitor that is connected from this pin to GND which ramps up the outputs
of the regulators, preventing the outputs from overshooting as well as limiting the input
current. The second function of the Soft Start cap is to provide long off time (HICCUP) for
the synchronous MOSFET during current limiting.
This pin has dual function. It acts as an output of the OVP circuitry or it can be used to
program the frequency using an external resistor . When used as a fault detector, if any
of the switcher outputs exceed the OVP trip point, the FAULT pin switches to 12V and
the soft start cap is discharged. If the FAULT pin is to be connected to any external
circuitry, it needs to be buffered.
This pin controls the gate of an external transistor for the 1.5V GTL+ linear regulator.
This pin provides the feedback for the linear regulator that its output drive is Drive3.
This pin is NO connect.
This pin provides the feedback for the linear regulator that its output drive is Drive4.
This pin serves as the ground pin and must be connected directly to the ground plane.
This pin serves as the Power ground pin and must be connected directly to the GND
plane close to the source of the synchronous MOSFET. A high frequency capacitor
(typically 1 uF) must be connected from V12 pin to this pin for noise free operation.
Output driver for the synchronous power MOSFET for the Core supply.
Output driver for the high side power MOSFET for the Core supply.
This pin is connected to the 12 V supply and serves as the power Vcc pin for the output
drivers. A high frequency capacitor (typically 1 uF) must be placed close to this pin and
PGND pin and be connected directly from this pin to the GND plane for the noise free
operation.
5V supply voltage. A high frequency capacitor (0.1 to 1 uF) must be placed close to this
pin and connected from this pin to the GND plane for noise free operation.
This pin provides automatic voltage selection for the AGP switching regulator. When it is
pulled LO, the voltage is 1.5V and when left open or pulled to HI, the voltage is 3.3V.
Leaving this pin open provides fixed output voltages of the 1.5V and 1.8V for the #3 and #4
linear regulators. When this pin is grounded the reference to the linear regulators are set
to 1.26V and therefore the output of the regulators can be programmed to any voltages
above the 1.26V using; Vout=1.26*(1+Rtop/Rbot)
Where:
Rtop=Top resistor connected from the output to the Vsense pin
Rbot=Bottom resistor connected from the Vsense pin to ground.
PIN# PIN SYMBOL
22
Vsen1
10
Vsen2
15
Drive4
23
OCSET
26
PHASE
12
SS
13
FAULT/Rt
18
Drive3
19
Vsen3
16
NC
14
Vsen4
17
GND
24
PGND
25
LGATE
27
UGATE
28
V12
20
V5
11
Select
2
FIX


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