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ST8024 Fiches technique(PDF) 9 Page - Sitronix Technology Co., Ltd. |
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ST8024 Fiches technique(HTML) 9 Page - Sitronix Technology Co., Ltd. |
9 / 28 page ST8024 Ver 2.1 Page 9/28 2009/08/19 DI6-DI0 Not used Connect DI6-DI0 to LGND or VDD, avoiding floating. XCK Not used XCK is pulled down in common mode, so connect to LGND or open. Y1 -Y240 LCD drive output pins Corresponding directly to each bit of the shift register, one level (V0, V12, V43, or VSS) is selected and output. Table of truth values is shown in "TRUTH TABLE" in Functional Operations. 7.2 Functional Operations 7.2.1 Truth table (Segment Mode) FR LATCH DATA /DISPOFF LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y240) L L H V43 L H H VSS H L H V12 H H H V0 X X L VSS (Common Mode) FR LATCH DATA /DISPOFF LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y240) L L H V43 L H H V0 H L H V12 H H H VSS X X L VSS NOTES: VSS < V43 < V12 < V0 L: LGND (0 V), H: VDD (+2.5 to +5.5 V), X: Don't care "Don't care" should be fixed to "H" or "L", avoiding floating. There are two kinds of power supply (logic level voltage and LCD drive voltage) for the LCD driver. Supply regular voltage which is assigned by specification for each power pin. |
Numéro de pièce similaire - ST8024 |
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Description similaire - ST8024 |
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