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ST8009 Fiches technique(PDF) 11 Page - Sitronix Technology Co., Ltd.

No de pièce ST8009
Description  96 Output LCD Common/ Segment Driver IC
Download  43 Pages
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Fabricant  SITRONIX [Sitronix Technology Co., Ltd.]
Site Internet  http://www.sitronix.com.tw
Logo SITRONIX - Sitronix Technology Co., Ltd.

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ST8009
V1.1
11/43
2006/11/1
(common /segment mix mode)
SYMBOL
FUNCTION
VDD
Logic system power supply pin, connected to +2.5 to +5.5 V.
VSS
Ground pin, connected to 0 V.
V0 , V1
V2 , V3
V4
When the internal power supply circuit turns on :
The internal power supply circuit will produce the LCD bias voltage set( V0 ~ V4 ), and those
voltages are setting by the “LCD Bias Set” register.
When the internal power supply circuit turns off :
Supply the bias voltages set by a resistor divider externally , and had better use follower circuit to
hold those voltages.
Ensure that voltages are set such that V0 ≧V1 ≧V2 ≧V3 ≧V4 ≧VSS
DI3~DI0
Input pins for display data
In 4-bit parallel input mode, input data into the 4 pins, DI3~DI0.
In serial input mode, connect data to the DI0 pin, and DI3-DI1 must be connected to VSS .
Refer to "RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD DRIVE OUTPUT
PINS" in Functional Operations.
XCK
Clock input pin for taking display data
Data is read at the falling edge of the clock pulse.
LP1
Latch pulse input pin for display data
Data is latched at the falling edge of the clock pulse.
LP2
Shift clock pulse input pin for bi-directional shift register
Data is shifted at the falling edge of the clock pulse.
When use gray scale mode, then must use the pin.
When use monochrome mode, then the pin should be shorted to LP1.
XDISPOFF
The switch for turn on or turn off the LCD display
The input signal is level-shifted from logic voltage level to LCD drive voltage level, and controls the
LCD drive circuit.
When set to VSS level "L", the LCD drive output pins (CS0-CS95) are set to level VSS.
When set to "L", the contents of the line latch are reset, but the display data are read in the
data latch regardless of the condition of XDISPOFF. When the XDISPOFF function is canceled,
the driver outputs non-select level (V2 or V3), then outputs the contents of the data latch at the
next falling edge of the LP. At that time, if XDISPOFF removal time does not correspond to what is
shown in AC characteristics, it cannot output the reading data correctly.
Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.
FR
AC signal input pin for LCD drive waveform
The input signal is level-shifted from logic voltage level to LCD drive voltage level, and controls the
LCD drive circuit.
The LCD drive output pins' output voltage levels can be set using the line latch output signal and
the FR signal, and it inputs a frame inversion signal normally.
Table of truth-values is shown in "TRUTH TABLE" in Functional Operations.


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