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AD8465 Fiches technique(PDF) 1 Page - Analog Devices

No de pièce AD8465
Description  Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply LVDS Comparator
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

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Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,
Single-Supply LVDS Comparator
AD8465
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
FEATURES
Fully specified rail to rail at VCCI = 2.5 V to 5.5 V
Input common-mode voltage from −0.2 V to VCCI + 0.2 V
Low glitch LVDS-compatible output stage
Propagation delay: 1.6 ns
Power dissipation: 37 mW at 2.5 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection > 60 dB
−40°C to +125°C operation
APPLICATIONS
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
Pulse spectroscopy
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
Automatic test equipment (ATE)
Automotive
FUNCTIONAL BLOCK DIAGRAM
VP NONINVERTING
INPUT
VN INVERTING
INPUT
SDN INPUT
Q OUTPUT
VCCO
VCCI
Q OUTPUT
LE/HYS INPUT
AD8465
LVDS
Figure 1.
GENERAL DESCRIPTION
The AD8465 is a very fast comparator fabricated on the Analog
Devices, Inc., proprietary XFCB2 process. This comparator is
exceptionally versatile and easy to use. Features include an
input range from VEE − 0.5 V to VCCI + 0.2 V, low noise, LVDS-
compatible output drivers, and TTL/CMOS latch inputs with
adjustable hysteresis and/or shutdown inputs.
The device offers 1.6 ns propagation delay with 1 ps rms
random jitter (RJ). Overdrive and slew rate dispersion are
typically less than 50 ps.
A flexible power supply scheme allows the devices to operate
with a single 2.5 V positive supply and a −0.5 V to +2.7 V input
signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V
input signal range. Split input/output supplies, with no sequencing
restrictions, support a wide input signal range with greatly
reduced power consumption.
The LVDS-compatible output stage is designed to drive any
standard LVDS input. The comparator input stage offers robust
protection against large input overdrive, and the outputs do not
phase reverse when the valid input signal range is exceeded. High
speed latch and programmable hysteresis features are also provided
in a unique single-pin control option.
The AD8465 is available in a 12-lead LFCSP.


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