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UC2871 Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce UC2871
Description  Resonant Fluorescent Lamp Driver
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

UC2871 Fiches technique(HTML) 4 Page - Texas Instruments

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Figure 1
UC1871
UC2871
UC3871
Figure 1 shows a complete application circuit using the
UC3871 Resonant Fluorescent lamp and LCD driver.
The IC provides all drive, control and housekeeping func-
tions to implement CCFL and LCD converters. The buck
output voltage (transformer center-tap) provides the zero
crossing and synchronization signal. The LCD supply
modulator is also synchronized to the resonant tank.
The buck modulator drives a P-channel MOSFET di-
rectly, and operates over a 0-100% duty-cycle range. The
modulation range includes 100%, allowing operation with
minimal headroom. The LCD supply modulator also di-
rectly drives a P-channel MOSFET, but it’s duty-cycle is
limited to 95% to prevent flyback supply foldback.
The oscillator and synchronization circuitry are shown in
Figure 2. The oscillator is designed to synchronize over a
3:1 frequency range. In an actual application however,
the frequency range is only about 1.5:1. A zero detect
comparator senses the primary center-tap voltage, gen-
erating a synchronization pulse when the resonant wave-
form falls to zero. The actual threshold is 0.5 volts,
providing a small amount of anticipation to offset propa-
gation delay.
The synchronization pulse width is the time that the 4mA
current sink takes to discharge the timing capacitor to 0.1
volts. This pulse width sets the LCD supply modulator
minimum off time, and also limits the minimum linear
control range of the buck modulator. The 200
µA current
source charges the capacitor to a maximum of 3 volts. A
comparator blanks the zero detect signal until the capaci-
tor voltage exceeds 1 volt, preventing multiple synchroni-
zation pulse generation and setting the maximum
frequency. If the capacitor voltage reaches 3 volts (a zero
detection has not occurred) an internal clock pulse is
generated to limit the minimum frequency.
TYPICAL APPLICATION
APPLICATION INFORMATION
4


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