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TPS51163DRCT Fiches technique(PDF) 2 Page - Texas Instruments

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No de pièce TPS51163DRCT
Description  SYNCHRONOUS BUCK CONTROLLER WITH HIGH-CURRENT GATE DRIVER
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS51163DRCT Fiches technique(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
(1) (2)
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
TPS51113, TPS51163
SLUS864 – MAY 2009........................................................................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
LEAD/BALL
MSL PEAK
ORDERABLE
TYPE
DRAWING
PINS
QTY
ECO PLAN
DEVICE
FINISH
TEMPERATURE
TPS51113DRCR
Green
SON
DRC
10
3000
CU NiPDAU
Level-2-260C-1Year
(RoHS and no Sb/Br)
TPS51163DRCR
TPS51113DRCT
Green
SON
DRC
10
250
CU NiPDAU
Level-2-260C-1Year
(RoHS and no Sb/Br)
TPS51163DRCT
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Over operating free-air temperature range (unless otherwise noted, all voltages are with respect to GND.)
PARAMETER
VALUE
UNIT
VDD
–0.3 to 15
BOOT
–0.3 to 30
BOOT, to SW (negative overshoot –5 V for t < 25 ns,
–5.0 to 15
Input voltage range
125 V × ns/t for 25 ns < t< 100 ns)
V
BOOT, (negative overshoot –5 V for t < 25ns,
–5.0 to 37
125 V × ns/t for 25 ns < t < 100 ns)
All other pins
–0.3 to 3.6
SW
–0.3 to 22
SW, (negative overshoot –5 V for t < 25ns,
–5.0 to 30
125 V × ns/t for 25 ns < t < 100 ns)
HDRV
–0.3 to 30
HDRV to SW (negative overshoot –5 V for t < 25 ns,
–5.0 to 15
125 V × ns/t for 25 ns < t< 100 ns)
Output voltage range
HDRV (negative overshoot –5 V for t < 25ns,
V
–5.0 to 37
125 V × ns/t for 25 ns < t < 100 ns)
LDRV_OC
–0.3 to 15
LDRV_OC (negative overshoot –5 V for t < 25ns,
–5.0 to 15
125 V × ns/t for 25 ns < t < 100 ns)
PGOOD
–0.3 to 15
All other pins
–0.3 to 3.6
TJ
Operating junction temperature
–40 to 125
°C
Tstg Storage junction temperature
–55 to 150
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to the network ground terminal unless otherwise noted.
MIN
TYP
MAX
UNIT
Human Body Model (HBM)
2500
V
Charged Device Model (CDM)
1500
2
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPS51113 TPS51163


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