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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TLV320AIC3007 Fiches technique(PDF) 52 Page - Texas Instruments |
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TLV320AIC3007 Fiches technique(HTML) 52 Page - Texas Instruments |
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52 / 98 page  TLV320AIC3007 SLOS619 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com Page 0 / Register 12: Audio Codec Digital Filter Control Register BIT READ/ RESET DESCRIPTION WRITE VALUE D7–D6 R/W 00 Left ADC Highpass Filter Control 00: Left ADC highpass filter disabled 01: Left ADC highpass filter –3 dB frequency = 0.0045 × ADC Fs 10: Left ADC highpass filter –3 dB frequency = 0.0125 × ADC Fs 11: Left ADC highpass filter –3 dB frequency = 0.025 × ADC Fs D5–D4 R/W 00 Right ADC Highpass Filter Control 00: Right ADC highpass filter disabled 01: Right ADC highpass filter –3 dB frequency = 0.0045 × ADC Fs 10: Right ADC highpass filter –3 dB frequency = 0.0125 × ADC Fs 11: Right ADC highpass filter –3 dB frequency = 0.025 × ADC Fs D3 R/W 0 Left DAC Digital Effects Filter Control 0: Left DAC digital effects filter disabled (bypassed) 1: Left DAC digital effects filter enabled D2 R/W 0 Left DAC De-emphasis Filter Control 0: Left DAC de-emphasis filter disabled (bypassed) 1: Left DAC de-emphasis filter enabled D1 R/W 0 Right DAC Digital Effects Filter Control 0: Right DAC digital effects filter disabled (bypassed) 1: Right DAC digital effects filter enabled D0 R/W 0 Right DAC De-emphasis Filter Control 0: Right DAC de-emphasis filter disabled (bypassed) 1: Right DAC de-emphasis filter enabled Page 0 / Register 13: Headset / Button Press Detection Register A BIT READ/ RESET DESCRIPTION WRITE VALUE D7 R/W 0 Headset Detection Control 0: Headset detection disabled 1: Headset detection enabled D6-D5 R 00 Headset Type Detection Results 00: No headset detected 01: Stereo headset detected 10: Cellular headset detected 11: Stereo + cellular headset detected D4-D2 R/W 000 Headset Glitch Suppression Debounce Control for Jack Detection 000: Debounce = 16msec( sampled with 2ms clock) 001: Debounce = 32msec( sampled with 4ms clock) 010: Debounce = 64msec( sampled with 8ms clock) 011: Debounce = 128msec( sampled with 16ms clock) 100: Debounce = 256msec( sampled with 32ms clock) 101: Debounce = 512msec( sampled with 64ms clock) 110: Reserved, do not write this bit sequence to these register bits. 111: Reserved, do not write this bit sequence to these register bits. D1-D0 R/W 00 Headset Glitch Suppression Debounce Control for Button Press 00: Debounce = 0msec 01: Debounce = 8msec(sampled with 1ms clock) 10: Debounce = 16msec(sampled with 2ms clock) 11: Debounce = 32msec(sampled with 4ms clock) 52 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TLV320AIC3007 |
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Description similaire - TLV320AIC3007 |
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