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TPIC1502DW Fiches technique(PDF) 5 Page - Texas Instruments |
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TPIC1502DW Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 16 page TPIC1502 QUAD AND HEX POWER DMOS ARRAY SLIS054 – OCTOBER 1996 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 source-to-drain diode characteristics, Q3A, Q4A, Q5A, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT trr Reverse-recovery time IS = 750 mA, VDS 14 V VGS = 0, di/dt 100 A/ µs 26 ns QRR Total diode charge VDS = 14 V, See Figures 2 and 23 di/dt = 100 A/ µs, 17 nC resistive-load switching characteristics, Q3A, Q3B, Q4A, Q4B, Q5A, Q5B, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(on) Turn-on delay time 13 td(off) Turn-off delay time VDD = 14 V, RL = 18.7 Ω,ten = 10 ns, 13 ns tr Rise time DD , tdis = 10 ns, L , See Figure 3 en , 3 ns tf Fall time 7 Qg Total gate charge V 14 V I 750 A V10 V 1 1.3 Qgs(th) Threshold gate-to-source charge VDS = 14 V, ID = 750 mA, See Figure 4 and Figure 22 VGS = 10 V, 0.2 0.25 nC Qgd Gate-to-drain charge See Figure 4 and Figure 22 0.2 0.25 LD Internal drain inductance 7 nH LS Internal source inductance 7 nH Rg Internal gate resistance 0.25 Ω thermal resistance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT R θJA Junction-to-ambient thermal resistance See Notes 5 and 8 90 R θJB Junction-to-board thermal resistance See Notes 6 and 8 52 °C/W R θJP Junction-to-pin thermal resistance See Notes 7 and 8 28 NOTES: 5. Package mounted on a FR4 printed-circuit board with no heatsink. 6. Package mounted on a 24 in2, 4-layer FR4 printed-circuit board. 7. Package mounted in intimate contact with infinite heatsink. 8. All outputs with equal power |
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