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SN74ALVCH16823 Fiches technique(PDF) 6 Page - Texas Instruments |
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SN74ALVCH16823 Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 10 page SN74ALVCH16823 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCES038D – JULY 1995 – REVISED FEBRUARY 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3) VCC = 1.8 V VCC = 2.5 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX fclock Clock frequency † 150 150 150 MHz t Pulse duration CLR low † 3.3 3.3 3.3 ns tw Pulse duration CLK high or low † 3.3 3.3 3.3 ns CLR inactive † 0.7 0.7 0.8 t Setup time Data low before CLK ↑ † 1.6 1.6 1.3 ns tsu Setup time Data high before CLK ↑ † 1.1 1.1 1 ns CLKEN low before CLK ↑ † 1.9 1.9 1.5 Data low after CLK ↑ † 0.5 0.5 0.5 th Hold time Data high after CLK ↑ † 0.1 0.1 0.8 ns CLKEN low after CLK ↑ † 0.3 0.3 0.4 † This information was not available at the time of publication. switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT (INPUT) (OUTPUT) MIN TYP MIN MAX MIN MAX MIN MAX fmax † 150 150 150 MHz t d CLK Q † 1 5.8 5.2 1 4.5 ns tpd CLR Q † 1 5.4 5.2 1.2 4.6 ns ten OE Q † 1 6 5.7 1 4.8 ns tdis OE Q † 1.1 5.4 4.7 1.3 4.5 ns † This information was not available at the time of publication. operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V UNIT PARAMETER TEST CONDITIONS TYP TYP TYP UNIT C d Power dissipation Outputs enabled CL =50 pF f=10MHz † 27 30 pF Cpd capacitance Outputs disabled CL = 50 pF, f = 10 MHz † 16 18 pF † This information was not available at the time of publication. |
Numéro de pièce similaire - SN74ALVCH16823 |
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Description similaire - SN74ALVCH16823 |
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