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SN74ALVCH16282 Fiches technique(PDF) 2 Page - Texas Instruments |
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SN74ALVCH16282 Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 10 page SN74ALVCH16282 18-BIT TO 36-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES036D – JULY 1995 – REVISED MARCH 2000 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Function Tables A-TO-B STORAGE (OE = L, DIR = H) INPUTS OUTPUTS SEL CLK A 1B 2B H X X 1B0† 2B0† L ↑ LL‡ X L ↑ H H‡ X † Output level before indicated steady-state input conditions were established ‡ Two CLK edges are needed to propagate the data. B-TO-A STORAGE (OE = L, DIR = L) INPUTS OUTPUT CLK SEL 1B 2B A ↑ H X L L§ ↑ HX H H§ ↑ LL X L ↑ L H X H § Two CLK edges are needed to propagate the data. The data is loaded in the first register when SEL is low and propagates to the second register when SEL is high. OUTPUT ENABLE INPUTS OUTPUTS CLK OE DIR A 1B, 2B ↑ H X Z Z ↑ LH Z Active ↑ L L Active Z |
Numéro de pièce similaire - SN74ALVCH16282 |
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Description similaire - SN74ALVCH16282 |
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