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SN74ALS29828DW Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74ALS29828DW Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 5 page DW OR NT PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OE1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND VCC Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 OE2 SN74ALS29827, SN74ALS29828 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS SDAS095B – JANUARY 1986 – REVISED JANUARY 1995 Copyright © 1995, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 • Functionally Equivalent to AMD’s AM29827 and AM29828 • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • pnp Inputs Reduce dc Loading • Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) • Power-Up High-Impedance State • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs description These 10-bit buffers and bus drivers provide high-performance bus interface for wide data paths or buses carrying parity. The 3-state control gate is a 2-input NOR such that if either output-enable (OE1 or OE2) input is high, all ten outputs are in the high-impedance state. The SN74ALS29827 provides true data and the SN74ALS29828 provides inverted data at their respective outputs. The SN74ALS29827 and SN74ALS29828 are characterized for operation from 0 °C to 70°C. logic symbols† 2 A1 3 A2 4 A3 5 A4 6 A5 Y1 23 Y2 22 Y3 21 Y4 20 Y5 19 Y6 18 Y7 17 Y8 16 7 A6 8 A7 9 A8 13 1 OE1 OE2 EN & Y9 15 Y10 14 10 A9 11 A10 13 2 A1 3 A2 4 A3 5 A4 6 A5 Y1 23 Y2 22 Y3 21 Y4 20 Y5 19 Y6 18 Y7 17 Y8 16 7 A6 8 A7 9 A8 EN & OE2 1 OE1 10 A9 11 A10 Y9 15 Y10 14 SN74ALS29827 SN74ALS29828 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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