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CD74HCT259 Fiches technique(PDF) 1 Page - Texas Instruments |
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CD74HCT259 Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 9 page 1 Data sheet acquired from Harris Semiconductor SCHS173 Features • Buffered Inputs and Outputs • Four Operating Modes • Typical Propagation Delay of 15ns at VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The Harris CD74HC259 and CD74HCT259 Addressable Latch features the low-power consumption associated with CMOS circuitry and has speeds comparable to low-power Schottky. This latches three active modes and one reset mode. When both the Latch Enable (LE) and Master Reset (MR) inputs are low (8-line Demultiplexer mode) the output of the addressed latch follows the Data input and all other outputs are forced low. When both MR and LE are high (Memory Mode), all outputs are isolated from the Data input, i.e., all latches hold the last data presented before the LE transition from low to high. A condition of LE low and MR high (Addressable Latch mode) allows the addressed latch’s output to follow the data input; all other latches are unaffected. The Reset mode (all outputs low) results when LE is high and MR is low. Pinout CD74HC259, CD74HCT259 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. CD74HC259E -55 to 125 16 Ld PDIP E16.3 CD74HCT259E -55 to 125 16 Ld PDIP E16.3 CD74HC259M -55 to 125 16 Ld SOIC M16.15 CD74HCT259M -55 to 125 16 Ld SOIC M16.15 NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer or die for this part number is available which meets all elec- trical specifications. Please contact your local sales office or Harris customer service for ordering information. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 A0 A1 A2 Q0 Q1 Q2 GND Q3 VCC LE D Q7 Q6 Q5 Q4 MR November 1997 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 File Number 1727.1 CD74HC259, CD74HCT259 High Speed CMOS Logic 8-Bit Addressable Latch [ /Title (CD74 HC259 , CD74 HCT25 9) /Sub- ject (High Speed CMOS Logic 8-Bit Addres sable Latch) |
Numéro de pièce similaire - CD74HCT259 |
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Description similaire - CD74HCT259 |
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