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CD74HC03 Datasheet(Fiches technique) 1 Page - Texas Instruments

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Numéro de pièce CD74HC03
Description  High Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain
Télécharger  6 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
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Data sheet acquired from Harris Semiconductor
SCHS126
Features
• Buffered Inputs
• Typical Propagation Delay: 8ns at VCC = 5V,
CL = 15pF, TA = 25
oC
• Output Pull-up to 10V
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The Harris CD74HC03 and CD74HCT03 logic gates utilize
silicon gate CMOS technology to achieve operating speeds
similar to LSTTL gates with the low power consumption of
standard CMOS integrated circuits. All devices have the abil-
ity to drive 10 LSTTL loads. The 74HCT logic family is func-
tionally as well as pin compatible with the standard 74LS
logic family.
These open drain NAND gates can drive into resistive loads
to output voltages as high as 10V. Minimum values of RL
required verses load voltage are shown in Figure 2.
Pinout
CD74HC03, CD74HCT03
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG.
NO.
CD74HC03E
-55 to 125
14 Ld PDIP
E14.3
CD74HCT03E
-55 to 125
14 Ld PDIP
E14.3
CD74HC03M
-55 to 125
14 Ld SOIC
M14.15
CD74HCT03M
-55 to 125
14 Ld SOIC
M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
February 1998
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1998
File Number
1832.1
CD74HC03,
CD74HCT03
High Speed CMOS Logic
Quad 2-Input NAND Gate with Open Drain
[ /Title
(CD74H
C03,
CD74H
CT03)
/Subject
(High
Speed
CMOS
Logic
Quad 2-
Input




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