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TEA1024 Fiches technique(PDF) 3 Page - TEMIC Semiconductors |
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TEA1024 Fiches technique(HTML) 3 Page - TEMIC Semiconductors |
3 / 8 page TEA1024/ TEA1124 TELEFUNKEN Semiconductors Rev. A1, 24-May-96 3 (8) – + Protection 50 k W 150 k W A D/A converter D 20 Current sink 21 22 23 4 stage ripple counter Divider 1:2 (1:4) Period 20 ms (40 ms) 2 6 1 4 –VS Rx Ry GND 7 Sync (50 Hz) 95 11411 Figure 4. Principle diagram – Generation and evaluation of ramp Period 1. The time required for one complete cycle of a regular. repeating signal, function, or series of emends. 2. The tune between two consecutive transients of the pointer or indicating means of an electrical indicating instrument in the same disdain the rest position. Something called periodic fine. Comparator The comparison of set value and measured value is carried out via the two comparator inputs Pin 1 and Pin 2. Here Pin 2 is the inverting input and has a circuit pro- tecting it against interference spikes. Figure 5 shows the protective circuit of the comparator. Pin 1 is the non- inverting input. Ramp generator 95 11412 + – R T Z 1 6 2 GND Figure 5. Protective circuit of the comparator Firing Pulse Width (Figures 6, 7) It depends on the latching current as well as on the load current of the used triacs. whereas IL[A] = Latching current of the triac VM[V]= Mains voltage, effective P [W] = Power load f [1/s] = Mains frequency tp [s] + 3 4 p f arcsin I L V M P 2 Firing pulse width is specified through the zero cross over identification which can be influenced by the sync. resistance. Rsync [ W] + V M 2 sin 2 3 w tp –0.6 2.5 10–5 –1.4 10 3 where tp [s] = required ignition pulse width |
Numéro de pièce similaire - TEA1024 |
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Description similaire - TEA1024 |
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