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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ISL54059 Fiches technique(PDF) 8 Page - Intersil Corporation |
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ISL54059 Fiches technique(HTML) 8 Page - Intersil Corporation |
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8 / 14 page  8 FN6579.0 December 19, 2008 Detailed Description The ISL54059 is a bi-directional, dual single pole-double throw (SPDT) analog switch that offers precise switching from a single 1.8V to 6.5V supply with low ON-resistance (0.83 Ω) and high speed operation (tON =55ns, tOFF = 18ns). The device is especially well suited for portable battery powered equipment due to its low operating supply voltage (1.8V), low power consumption (8nA), and a tiny 1.8x1.4mm µ TQFN package or a 3x3mm TDFN package. The low ON-resistance and rON flatness provide very low insertion loss and signal distortion for applications that require signal switching with minimal interference by the switch. Supply Sequencing and Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. The ISL54059 contains ESD protection diodes on each pin of the IC (see Figure 8). These diodes connect to either a +Ring or -Ring for ESD protection. To prevent forward biasing the ESD diodes to the +Ring, V+ must be applied before any input signals, and the input signal voltages must remain between recommended operating range. If these conditions cannot be guaranteed, then precautions must be implemented to prohibit the current and voltage at the logic pin and signal pins from exceeding the maximum ratings of the switch. The following two methods can be used to provided additional protection to limit the current in the event that the voltage at a logic pin or switch terminal goes above the V+ rail. Logic inputs can be protected by adding a 1k Ω resistor in series with the logic input (see Figure 8). The resistor limits FIGURE 4. OFF-ISOLATION TEST CIRCUIT FIGURE 5. rON TEST CIRCUIT FIGURE 6. CROSSTALK TEST CIRCUIT FIGURE 7. CAPACITANCE TEST CIRCUIT Test Circuits and Waveforms (Continued) ANALYZER RL SIGNAL GENERATOR V+ C 0V OR V+ NO OR NC COM IN GND Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. *50 Ω SOURCE V+ C 0V OR V+ NO OR NC COM IN GND VNX V1 rON = V1/100mA 100mA Repeat test for all switches. 0V OR V+ ANALYZER V+ C NO1 OR NC1 SIGNAL GENERATOR RL GND INX COM1 50 Ω NC COM2 NC2 OR NO2 Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. *50 Ω SOURCE V+ C GND NO OR NC COM IN IMPEDANCE ANALYZER 0V OR V+ COM is connected to NO or NC during ON capacitance measurement. ISL54059 |
Numéro de pièce similaire - ISL54059 |
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Description similaire - ISL54059 |
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