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TS5070FNTR Fiches technique(PDF) 4 Page - STMicroelectronics |
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TS5070FNTR Fiches technique(HTML) 4 Page - STMicroelectronics |
4 / 32 page PIN CONNECTIONS POWER SUPPLY, CLOCK Name Pin Type TS5070 FN TS5071 N Function Description VCC VSS GND S S S 27 3 1 19 3 1 Positive Power Supply Negative Power Supply Ground +5 V ± 5% –5V ± 5% All analog and digital signals are referenced to this pin. BCLK I 16 12 Bit Clock Bit clock input used to shift PCM data into and out of the DR and DX pins. BCLK may vary from 64 kHz to 4.096 MHz in 8 kHz increments, and must be synchronous with MCLK (TS5071 only). MCLK I 17 12 Master Clock Master clock input used by the switched capacitor filters and the encoder and decoder sequencing logic. Must be 512 kHz, 1. 536/1. 544 MHz, 2.048 MHz or 4.096 MHz and synchronous with BCLK. BCLK and MCLK are wired together in the TS5071. PLCC28 TS5070FN DIP20 TS5071N TS5070 - TS5071 4/32 |
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