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TDA9106A Fiches technique(PDF) 9 Page - STMicroelectronics

No de pièce TDA9106A
Description  LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
Download  30 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA9106A Fiches technique(HTML) 9 Page - STMicroelectronics

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VERTICAL SECTION
Operating Conditions
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OUTPUTS SECTION
VEWM
Maximum EW Output Voltage
Pin 31
6.5
V
VEWm
Minimum EW Output Voltage
Pin 31
1.8
V
VDFm
Minimum Vertical Dynamic Focus Output Voltage
Pin 32
1.8
V
RLOAD
Minimum Load for less than 1% Vertical Amplitude Drift
Pin 25
65
M
Electrical Characteristics (VCC = 12V, Tamb =25
oC)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VERTICAL RAMP SECTION
VRB
Voltage at Ramp Bottom Point
VREF-V=8V, Pin 27
2
V
VRT
Voltage at Ramp Top Point (with Sync) VREF-V
Pin 27
5
V
VRTF
Voltage at Ramp Top Point (without Sync)
Pin 27
VRT-
0.1
V
VSTD
Vertical Sawtooth Discharge Time Duration
(Pin 27)
With 150nF Cap
80
µs
VFRF
Vertical Free Running Frequency
(see Notes 3 & 4)
COSC (Pin 27) = 150nF
Measured on Pin27,
100
Hz
ASFR
AUTO-SYNC Frequency
C27 = 150nF
±5%
See Note 5
50
165
Hz
RAFD
Ramp Amplitude Drift Versus Frequency at
Maximum Vertical Amplitude
C27 = 150nF
50Hz < f and f < 165Hz
200
TBD
ppm/Hz
Rlin
Ramp Linearity on Pin 27 (see Notes 3 & 4)
2.5 < V27 and V27 < 4.5V
0.5
%
Vpos
Vertical Position Adjustment Voltage (Pin28)
Sub Address 06
Byte x0000000
Byte x1000000
Byte x1111111
3.65
3.2
3.5
3.8
3.3
V
V
V
IVPOS
Max Current on Vertical Position Output
Pin 28
±2mA
VOR
Vertical Output Voltage
(peak-to-peak on Pin 29)
Sub Address 05
Byte x0000000
Byte x1000000
Byte x1111111
3.5
2.25
3
3.75
2.5
V
V
V
VoutDC
DC Voltage on Vertical Output
See Note 6, Pin 29
3.5
V
VOI
Vertical Output Maximum Current (Pin29)
±5mA
dVS
Max Vertical S-Correction Amplitude
x0xxxxxx inhibits S-CORR
x1111111 gives max S-CORR
Subaddress 07
∆V/VPP at T/4
∆V/VPP at 3T/4
-4
+4
%
%
Ccorr
Vertical C-Corr Amplitude
x0xxxxxx inhibits C-CORR
SubAddress 08
Byte x1000000
Byte x1100000
Byte x1111111
-3
0
3
%
%
%
VflyTh
Vertical Flyback Threshold
Pin 30
1
V
VflyInh
Inhibition of Vertical Flyback Input
See Note 7, Pin 30
7.5
V
Notes : 3. With Register 07 at Byte x0xxxxxx (Vertical S-Correction Control) then the S correction is inhibited, consequently the sawtooth has
a linear shape.
4. With Register 08 at Byte x0xxxxxx (Vertical C - Correction Control) then the C correction is inhibited, consequently the sawtooth
has a linear shape.
5. It is the frequency range for which the VERTICAL OSCILLATOR will automatically synchronize, using a single capacitor value on
Pin 27 and with a constant ramp amplitude.
6. VOUTDC = (7/16).VREF-V. Typically 3.5V for Vertical reference voltage typical value (8V).
7. When Pin 30 ( VREF-V) - 0.5V, Vfly input is inhibited and vertical blanking on vertical blanking output is replaced by vertical sawtooth
discharge time.
TDA9106A
9/30


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