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LC75857W Fiches technique(PDF) 7 Page - Sanyo Semicon Device

No de pièce LC75857W
Description  CMOS IC 1/3, 1/4 Duty LCD Display Drivers with Key Input Function
Download  39 Pages
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Fabricant  SANYO [Sanyo Semicon Device]
Site Internet  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC75857W Fiches technique(HTML) 7 Page - Sanyo Semicon Device

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No. 7980-7/39
LC75857E, LC75857W
Pin
Pin No.
Function
Active
I/O
Handling
when unused
O
OPEN
COM1
to
O
OPEN
COM3
COM4/S39
KS1/S40
43
KS2/S41
44
O
OPEN
KS3/S42
45
KS4 to KS6
46 to 48
KI1 to KI5
49 to 53
H
I
GND
OSC
60
I/O
VDD
CE
62
H
I
CL
63
I
GND
DI
64
I
DO
61
O
OPEN
TEST
59
This pin must be connected to ground.
I
VLCD1
56
I
OPEN
VLCD2
57
I
OPEN
VDD
54
VLCD
55
VSS
58
Power supply connection. Connect to ground.
Pin Functions
Segment outputs for displaying the display data transferred by serial data input.
The S1/P1 to S4/P4 pins can be used as general-purpose output ports under serial
data control.
Common driver outputs
The frame frequency is fo [Hz]
The COM4/S39 pin can be used as a segment output in 1/3 duty.
Key scan outputs
Although normal key scan timing lines require diodes to be inserted in the timing lines
to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these
outputs will not be damaged by shorting when these outputs are used to form a key
matrix. The KS1/S40 to KS3/S42 pins can be used as segment outputs when so
specified by the control data.
Key scan inputs
These pins have built-in pull-down resistors.
The OSC pin can be used to form an oscillator circuit with an external resistor and an
external capacitor. If external clock mode is selected with the control data, this pin is
used to input an external clock signal.
Serial data interface connections to the controller. Note that DO, being an open-drain
output, requires a pull-up resistor.
CE :Chip enable
CL :Synchronization clock
DI :Transfer data
DO :Output data
Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to
VLCD2 when a 1/2 bias drive scheme is used.
Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to
VLCD1 when a 1/2 bias drive scheme is used.
Logic block power supply connection. Provide a voltage of between 2.7 and 6.0V.
LCD driver block power supply connection. A voltage in the range 0.75
× VDD to 6.0 V
must be provided when VDD is in the range 3.6 to 6.0 V, and a voltage in the range
2.7 V to 6.0 V must be provided when VDD is in the range 2.7 to 3.6 V.
S1/P1 to
S4/P4
S5 to S38
1 to 4
5 to 38
42 to 40
39


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