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STB5NC70Z-1 Fiches technique(PDF) 1 Page - STMicroelectronics |
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STB5NC70Z-1 Fiches technique(HTML) 1 Page - STMicroelectronics |
1 / 12 page 1/12 December 2002 STP5NC70Z - STP5NC70ZFP STB5NC70Z - STB5NC70Z-1 N-CHANNEL 700V - 1.8 Ω - 4.6A TO-220/FP/D²PAK/I²PAK Zener-Protected PowerMESH™III MOSFET s TYPICAL RDS(on) = 1.8 Ω s EXTREMELY HIGH dv/dt AND CAPABILITY GATE TO - SOURCE ZENER DIODES s 100% AVALANCHE TESTED s VERY LOW GATE INPUT RESISTANCE s GATE CHARGE MINIMIZED DESCRIPTION The third generation of MESH OVERLAY™ Power MOSFETs for very high voltage exhibits unsurpassed on-resistance per unit area while integrating back-to- back Zener diodes between gate and source. Such ar- rangement gives extra ESD capability with higher rug- gedness performance as requested by a large variety of single-switch applications. APPLICATIONS s SINGLE-ENDED SMPS IN MONITORS, COMPUTER AND INDUSTRIAL APPLICATION s WELDING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (1)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STP5NC70Z/FP 700V < 2 Ω 4.6 A STB5NC70Z/-1 700V < 2 Ω 4.6 A Symbol Parameter Value Unit STP(B)5NC70Z(-1) STP5NC70ZFP VDS Drain-source Voltage (VGS =0) 700 V VDGR Drain-gate Voltage (RGS =20kΩ) 700 V VGS Gate- source Voltage ± 25 V ID Drain Current (continuous) at TC = 25°C 4.6 4.6(*) A ID Drain Current (continuous) at TC = 100°C 2.9 2.9(*) A IDM (1) Drain Current (pulsed) 18.4 18.4 A PTOT Total Dissipation at TC = 25°C 100 35 W Derating Factor 0.8 0.32 W/°C IGS Gate-source Current ± 50 mA VESD(G-S) Gate source ESD(HBM-C=100pF, R=15K Ω) 3KV dv/dt Peak Diode Recovery voltage slope 3 V/ns VISO Insulation Winthstand Voltage (DC) -- 2000 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (q )ISD ≤4.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS,Tj ≤ TJMAX (*).Limited only by maximum temperature allowed TO-220 1 2 3 TO-220FP 1 2 3 I²PAK (Tabless TO-220) 1 3 D²PAK INTERNAL SCHEMATIC DIAGRAM |
Numéro de pièce similaire - STB5NC70Z-1 |
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Description similaire - STB5NC70Z-1 |
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