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LM3S2965-IRN50-A2 Fiches technique(PDF) 6 Page - List of Unclassifed Manufacturers

No de pièce LM3S2965-IRN50-A2
Description  Microcontroller
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Fabricant  ETC2 [List of Unclassifed Manufacturers]
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LM3S2965-IRN50-A2 Fiches technique(HTML) 6 Page - List of Unclassifed Manufacturers

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13.5
Register Descriptions .............................................................................................................. 304
14
Synchronous Serial Interface (SSI) ................................................................................ 338
14.1
Block Diagram ........................................................................................................................ 338
14.2
Functional Description ............................................................................................................. 338
14.2.1 Bit Rate Generation ................................................................................................................. 339
14.2.2 FIFO Operation ....................................................................................................................... 339
14.2.3 Interrupts ................................................................................................................................ 339
14.2.4 Frame Formats ....................................................................................................................... 340
14.3
Initialization and Configuration ................................................................................................. 347
14.4
Register Map .......................................................................................................................... 348
14.5
Register Descriptions .............................................................................................................. 349
15
Inter-Integrated Circuit (I2C) Interface ............................................................................ 375
15.1
Block Diagram ........................................................................................................................ 375
15.2
Functional Description ............................................................................................................. 375
15.2.1 I2C Bus Functional Overview .................................................................................................... 376
15.2.2 Available Speed Modes ........................................................................................................... 378
15.2.3 Interrupts ................................................................................................................................ 379
15.2.4 Loopback Operation ................................................................................................................ 379
15.2.5 Command Sequence Flow Charts ............................................................................................ 380
15.3
Initialization and Configuration ................................................................................................. 386
15.4
I2C Register Map ..................................................................................................................... 387
15.5
Register Descriptions (I2C Master) ........................................................................................... 388
15.6
Register Descriptions (I2C Slave) ............................................................................................. 401
16
Controller Area Network (CAN) Module ......................................................................... 410
16.1
Controller Area Network Overview ............................................................................................ 410
16.2
Controller Area Network Features ............................................................................................ 410
16.3
Controller Area Network Block Diagram .................................................................................... 411
16.4
Controller Area Network Functional Description ......................................................................... 412
16.4.1 Initialization ............................................................................................................................. 412
16.4.2 Operation ............................................................................................................................... 413
16.4.3 Transmitting Message Objects ................................................................................................. 413
16.4.4 Configuring a Transmit Message Object .................................................................................... 413
16.4.5 Updating a Transmit Message Object ....................................................................................... 414
16.4.6 Accepting Received Message Objects ...................................................................................... 414
16.4.7 Receiving a Data Frame .......................................................................................................... 415
16.4.8 Receiving a Remote Frame ...................................................................................................... 415
16.4.9 Receive/Transmit Priority ......................................................................................................... 415
16.4.10 Configuring a Receive Message Object .................................................................................... 415
16.4.11 Handling of Received Message Objects .................................................................................... 416
16.4.12 Handling of Interrupts .............................................................................................................. 416
16.4.13 Bit Timing Configuration Error Considerations ........................................................................... 417
16.4.14 Bit Time and Bit Rate ............................................................................................................... 417
16.4.15 Calculating the Bit Timing Parameters ...................................................................................... 419
16.5
Controller Area Network Register Map ...................................................................................... 421
16.6
Register Descriptions .............................................................................................................. 423
17
Analog Comparators ....................................................................................................... 451
17.1
Block Diagram ........................................................................................................................ 452
November 30, 2007
6
Preliminary
Table of Contents


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