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ADE5169ASTZF62-RL Fiches technique(PDF) 7 Page - Analog Devices |
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ADE5169ASTZF62-RL Fiches technique(HTML) 7 Page - Analog Devices |
7 / 148 page Preliminary Technical Data ADE5166/ADE5169/ADE5566/ADE5569 Rev. PrB | Page 7 of 148 ANALOG PERIPHERALS Table 3. Parameter Min Typ Max Unit Test Conditions/Comments INTERNAL ADCs (BATTERY, TEMPERATURE, VDCIN) Power Supply Operating Range 2.4 3.7 V Measured on VSWOUT No Missing Codes1 8 Bits Conversion Delay2 38 μs ADC Gain VDCIN Measurement 15.3 mV/LSB VBAT Measurement 14.6 mV/LSB Temperature Measurement 0.78 °C/LSB ADC Offset VDCIN Measurement at 3 V 206 LSB VBAT Measurement at 3.7 V 205 LSB Temperature Measurement at 25°C 129 LSB VDCIN Analog Input Maximum Signal Levels 3.3 V Input Impedance (DC) 1 MΩ Low VDCIN Detection Threshold 1.2 V POWER-ON RESET (POR) VDD POR Detection Threshold 2.7 V POR Active Timeout Period 33 ms VSWOUT POR Detection Threshold 2 V POR Active Timeout Period 20 ms VINTD POR Detection Threshold 2.1 V POR Active Timeout Period 16 ms VINTA POR Detection Threshold 2.05 V POR Active Timeout Period 120 ms BATTERY SWITCH OVER Voltage Operating Range (VSWOUT) 3.3 V VDD to VBAT Switching Switching Threshold (VDD) 2.7 V Switching Delay 10 ns When VDD to VBAT switch activated by VDD 30 ms When VDD to VBAT switch activated by VDCIN VBAT to VDD Switching Switching Threshold (VDD) 2.7 V Switching Delay 30 ms Based on VDD > 2.75 V VSWOUT To VBAT Leakage Current 10 nA VBAT = 0 V, VSWOUT = 3.43 V, TA = 25°C LCD, CHARGE PUMP ACTIVE Charge Pump Capacitance Between LCDVP1 and LCDVP2 100 nF LCDVA, LCDVB, LCDVC Decoupling Capacitance 470 nF LCDVA 1.75 V LCDVB 3.5 V 1/3 bias mode LCDVC 5.3 V 1/3 bias mode V1 Segment Line Voltage LCDVA − 0.1 LCDVA V Current on segment line = −2 μA V2 Segment Line Voltage LCDVB − 0.1 LCDVB V Current on segment line = −2 μA V3 Segment Line Voltage LCDVC − 0.1 LCDVC V Current on segment line = −2 μA DC Voltage Across Segment and COMx Pin 50 mV LCDVC − LCDVB, LCDVC − LCDVA, or LCDVB − LCDVA |
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