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TPS40132RHBTG4 Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS40132RHBTG4 Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 40 page www.ti.com TPS40132 SLUS776A – DECEMBER 2007 – REVISED FEBRUARY 2008 ELECTRICAL CHARACTERISTICS (continued) TA = -40°C to 85°C, VIN = 5.0 V, VDD = 12.0 V, RRT = 64.9 kΩ, TJ = TA (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SOFT START 32 clocks after EN/SYNC before SS current ISS Soft-start source current 3.0 5.0 7.0 µA begins RSS Soft-start pull down resistance 500 Ω VSS Fault enable threshold voltage 0.95 1.00 1.05 V CURRENT SENSE AMPLIFIER Input offset voltage CS1, CS2 -15 -3 10 mV Gain transfer to PWM comparator -100 mV ≤ VCS≤ 100 mV, VCSRT = 1.5 V 5 V/V Gain variance between phases VCS - VCSRTn = 100 mV -6% 0 6% Input offset variance between VCS = 0 V -6 0 6 mV phases Input common mode (2) 0 1 VBP8-0.7 V Bandwidth(2) 18 MHz DIFFERENTIAL AMPLIFIER Gain 1 V/V Gain tolerance VOUT = 5.5 V vs VOUT = 0.6 V, VGSNS = 0 V -0.5% 0.5% CMRR Common mode rejection ratio 0.6 V ≤ VOUT ≤ 5.5 V 50 dB Output source current VOUT - VGSNS = 2.0 V, VDIFFO ≥ 1.95 V 2 4 mA Output sink current VOUT - VGSNS = 2.0 V, VDIFFO ≥ 2.05 V 2 4 Bandwidth(2) 5 MHz Input impedance, non-inverting(2) VOUT to GND 40 k Ω Input impedance, inverting(2) VGSNS to VDIFFO 40 GATE DRIVERS Source on-resistance, HDRV1, VBOOT1 = 5 V, VBOOT2 = 5 V, VSW1 = 0 V, 1.0 2.0 3.5 HDRV2 VSW2 = 0 V, Sourcing 100 mA Ω VBOOT1 = 5 V, VBOOT2 = 5 V, VVIN5 = 5 V, Sink on-resistance, HDRV1, HDRV2 0.5 1.0 2.0 VSW1 = 0 V, VSW2 = 0 V, Sinking 100 mA Source on-resistance, LDRV1, VVIN5 = 5 V, VSW1 = 0 V, VSW2 = 0 V, 1 2 3.5 LDRV2 Sourcing 100 mA Ω VVIN5 = 5 V, VSW1 = 0 V, VSW2 = 0 V, Sink on-resistance, LDRV1, LDRV2 0.30 0.75 1.50 Sinking 100 mA tRISE Rise time, HDRV(2) CLOAD = 3.3 nF 25 75 tFALL Fall time, HDRV(2) CLOAD = 3.3 nF 25 75 tRISE Rise time, LDRV(2) CLOAD = 3.3 nF 25 75 tFALL Fall time, LDRV(2) CLOAD = 3.3 nF 25 60 ns SW falling to LDRV rising 50 tDEAD Dead time(2) LDRV falling to SW rising 30 tON Minimum controllable on-time(2) CLOAD = 3.3 nF 150 OUTPUT UNDERVOLTAGE FAULT VFB relative to GND 480 504 522 mV Undervoltage fault threshold VFB relative to VVREF -20% -16% -13% OUTPUT OVERVOLTAGE SET VOVSET relative to GND 660 675 690 mV Overvoltage threshold VOVSET relative to VVREF 10% 12.5% 15% (2) Ensured by design. Not production tested. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s) :TPS40132 |
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