ST93C06CB1013TR datasheet(11/15 Pages) STMICROELECTRONICS

No de pièce	ST93C06CB1013TR

Description	256 bit 16 x 16 or 32 x 8 SERIAL MICROWIRE EEPROM

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Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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AI01395

S

An-1

C

D

WRITE

START

D0

”1”

”0”

An

Glitch

An-2

ADDRESS AND DATA

ARE SHIFTED BY ONE BIT

Figure 11. WRITE Swquence with One Clock Glitch

The ST93C06C is an enhanced version of the

ST93C06A and offers the following extra features:

– Enhanced ESD voltage

– Functional security filtering glitches on the

clock input (C).

Refer to Table 2 (Absolute Maximum Ratings) for

more about ESD limits. The following description

will detail the Clock pulses counter (available only

on the ST93C06C).

In a normal environment, the ST93C06 is expected

to receive the exact amount of data on the D input,

that is the exact amount of clock pulses on the C

input.

In a noisy environment, the amount of pulses re-

ceived (on the clock input C) may be greater than

the clock pulses delivered by the Master (Microcon-

troller) driving the ST93C06C. In such a case, a

part of the instruction is delayed by one bit (see

Figure 11), and it may induce an erroneous write of

data at a wrong address.

The ST93C46C has an on-board counter which

counts the clock pulses from the Start bit until the

falling edge of the Chip Select signal. For the

WRITE instructions, the number of clock pulses

incoming to the counter must be exactly 18 (with

the Organisation by 8) from the Start bit to the

falling edge of Chip Select signal (1 Start bit + 2 bits

of Op-code + 7 bits of Address + 8 bits of Data =

18): if so, the ST93C06C executes the WRITE

instruction; if the number of clock pulses is not

equal to 18, the instruction will not be executed

(and data will not be corrupted).

In the same way, when the Organisation by 16 is

selected, the number of clock pulses incoming to

the counter must be exactly 25 (1 Start bit + 2 bits

of Op-code + 6 bits of Address + 16 bits of Data =

25) from the Start bit to the falling edge of Chip

Select signal: if so, the ST93C06C executes the

WRITE instruction; if the number of clock pulses is

not equal to 25, the instruction will not be executed

(and data will not be corrupted). The clock pulse

counter is active only on ERASE and WRITE in-

structions (WRITE, ERASE, ERAL, WRALL).

DIFFERENCES BETWEEN ST93C06 AND

ST93C06C (cont’d)

11/15

ST93C06, ST93C06C

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