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ST9040 Fiches technique(PDF) 10 Page - STMicroelectronics

No de pièce ST9040
Description  16K ROM HCMOS MCU WITH EEPROM, RAM AND A/D CONVERTER
Download  56 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST9040 Fiches technique(HTML) 10 Page - STMicroelectronics

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Figure 1-4. Memory Map
1.3 MEMORY
1.3.1 INTRODUCTION
The memory of the ST9 is divided into two spaces:
- Data memory with up to 64K (65536) bytes
- Program memory with up to 64K (65536) bytes
Thus, there is a total of 128K bytes of addressable
memory space.
The 16K bytes of on-chip ROM memory of the
ST9040 are selected at memory addresses 0
through 3FFFh (hexadecimal) in the PROGRAM
space.
The DATA space includes the 512 bytes of on-chip
EEPROM at addresses 0 through 1FFh and the
256 bytes of on-chip RAM memory at addresses
200h through 2FFh.
1.3.2 EEPROM
1.3.2.1 Introduction
The EEPROMmemory provides user-programma-
ble non-volatile memory on-chip, allowing fast and
reliable storage of user data. As there is also no
off-chip access required, as for an external serial
EEPROM, high security levels can be achieved.
The EEPROM memory is read as normal RAM
memory at Data Space addresses 0 to 1FFh, how-
ever one WAIT cycle is automatically added for a
Read cycle, while a byte write cycle to the
EEPROM will cause the start of an ERASE/WRITE
cycle at the addressed location. Word (16 bit)
writes are not allowed.
The programming cycle is self-timed, with a typical
programming time of 6ms. The voltage necessary
for programming the EEPROM is internally gener-
ated with a +18V charge pump circuit.
Up to 16 bytes of data may be programmed into
the EEPROM during the same write cycle by using
the PARALLEL WRITE function.
A standby mode is also available which disables all
power consumption sources within the EEPROM
for low power requirements. When STBY is high,
any attempt to access the EEPROM memory will
produce unpredictable results. After the re-ena-
bling of the EEPROM, a delay of 6 INTCLK cycles
must be allowed before the selection of the
EEPROM.
The EEPROM of the ST9040 has been imple-
mented in a high reliability technology developed
by SGS-THOMSON, this, together with the double
bit structure, allow 300k Erase/Write cycles and 10
year data retention to be achieved on a microcon-
troller.
Control of the EEPROM is performed through one
register mapped at register addressR241 in Page 0.
®
ST9040
10/56


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